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SCA3000-E05-1 参数 Datasheet PDF下载

SCA3000-E05-1图片预览
型号: SCA3000-E05-1
PDF下载: 下载PDF文件 查看货源
内容描述: [Analog Circuit]
分类和应用:
文件页数/大小: 45 页 / 1038 K
品牌: VTI [ VTI TECHNOLOGIES ]
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SCA3000 Series  
7
Application information  
7.1 Pin Description  
SCA3000 pin numbers are presented in Figure 14 below and pin descriptions in Table 22.  
Figure 13. SCA3000 sensing directions.  
Figure 14. SCA3000 pin numbers.  
Table 22. SCA3000 pin descriptions.  
SCA3000-D01, SCA3000-E01,  
SCA3000-D02, SCA3000-E02,  
SCA3000-D03 (in I2C usage),  
SCA3000-L01 (in I2C usage)  
SCA3000-E04,  
Pin # Name  
SCA3000-D03 (in SPI usage),  
SCA3000-L01 (in SPI usage)  
Not connected  
1
2
NC  
Not connected  
XRESET  
INT  
External reset, active low  
Interrupt output  
Connect to ground  
Digital ground  
External reset, active low  
Interrupt output  
Connect to ground  
Digital ground  
3
4
CLK  
5
DVSS  
DVDD  
DVIO  
CSB  
6
Digital supply  
Digital supply  
7
8
Digital I/O supply  
Chip select  
Digital I/O supply  
Not connected  
9
NC  
Not connected  
Not connected  
10  
11  
12  
13  
14  
15  
16  
17  
18  
NC  
Not connected  
Not connected  
SCK_SCL  
MISO_SDA  
MOSI  
AVDD  
AVSS  
AVSS  
ATSTIO  
NC  
SPI serial clock (SCK)  
SPI data out (MISO)  
SPI data in (MOSI)  
Analog supply  
I2C serial clock (SCL)  
I2C data in / out (SDA)  
Not connected  
Analog supply  
Analog ground  
Analog ground  
Analog ground  
Not connected  
Not connected  
Analog ground  
Not connected  
Not connected  
7.2 Recommended circuit diagram  
1. Connect 100 nF SMD capacitor between each supply voltage and ground level.  
2. Connect 1 µF capacitor between each supply voltage and ground level.  
3. Use one regulator for analog and digital supply (AVDD and DVDD).  
4. Use separate regulator for digital IO supply (DVIO).  
5. Xreset is needed always in start up: when Xreset is low, raise power supplies inside  
specification, then set Xreset high.  
6. INT-pin is used with output buffer as well as in Free Fall and Motion Detection mode.  
7. Serial interface (SPI or I2C) logical '1' level is determined by DVIO supply voltage level.  
VTI Technologies Oy  
www.vti.fi  
PRELIMINARY - Subject to changes  
Doc.Nr. 8257300A.06  
34/ 45  
Rev.A.06