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CMA3000-D01-10 参数 Datasheet PDF下载

CMA3000-D01-10图片预览
型号: CMA3000-D01-10
PDF下载: 下载PDF文件 查看货源
内容描述: 3轴加速度计 [3-axis accelerometer]
分类和应用:
文件页数/大小: 35 页 / 945 K
品牌: VTI [ VTI TECHNOLOGIES ]
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CMA3000-D0X Series  
5.3.3 SPI AC characteristics  
The AC characteristics of the CMA3000 SPI interface are defined in Figure 11 and in Table 10.  
TLS1  
TCH  
TCL  
TLS2  
TLH  
CSB  
SCK  
THOL  
TSET  
MOSI  
MISO  
MSB in  
DATA in  
LSB in  
TVAL1  
TVAL2  
TLZ  
MSB out  
DATA out  
LSB out  
Figure 11. Timing diagram for SPI communication.  
Table 10. AC characteristics of SPI communication.  
No.  
Parameter  
Conditions  
Symbol  
Min  
Typ  
Max  
Unit  
Terminal CSB, SCK  
Time from CSB (10%) to  
TLS1  
TLS2  
0.80*  
ns  
ns  
1
2
SCK (90%) (1  
Tper/2  
Time from SCK (10%) to  
CSB (90%) (1  
0.80*  
Tper/2  
Terminal SCK  
3
4
5
SCK low time  
Load capacitance  
at MISO < 50 pF  
Load capacitance  
at MISO < 50 pF  
TCL  
TCH  
0.80*  
Tper/2  
Tper/2  
ns  
ns  
Tper/2  
SCK high time  
0.80*  
Tper/2  
SCK Frequency  
fsck =  
1/Tper  
0.5  
MHz  
Terminal MOSI, SCK  
6
Time from changing MOSI  
TSET  
Tper/4  
Tper/4  
ns  
ns  
(10%, 90%) to SCK (90%)  
Data setup time  
7
Time from SCK (90%) to  
changing MOSI (10%, 90%)  
Data hold time  
THOL  
Terminal MISO, CSB  
8
Time from CSB (10%) to  
Load capacitance  
at MISO < 50 pF  
Load capacitance  
at MISO < 50 pF  
TVAL1  
TLZ  
Tper/4  
Tper/4  
ns  
ns  
stable MISO (10%, 90%)  
Time from CSB (90%) to  
high impedance state of  
MISO (1.  
9
Terminal MISO, SCK  
10 Time from SCK (10%) to  
stable MISO (10%, 90%) (1.  
Terminal MOSI, CSB  
11 Time between SPI cycles,  
CSB at high level (90%)  
is SCK period  
Load capacitance  
at MISO < 50 pF  
TVAL2  
1.5*Tper/4  
ns  
ns  
TLH  
11 * Tper  
1)  
T
per  
5.3.4 I2C AC characteristics  
Please, see Phillips Semiconductors, The I2C bus specification, Version 2.1, January 2000, pp. 31-  
33.  
VTI Technologies Oy  
www.vti.fi  
21/ 35  
Rev. 0.12  
Doc.Nr. 8281000.12