Preliminary
VG3617161DT
16Mb CMOS Synchronous Dynamic RAM
VIS
Random Row Write (Interleaving Banks) (2 of 2)
Burst Length=8, CAS Latency=3
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
CKE
t
CK3
High
CS
RAS
CAS
WE
A11(BS)
RAa
RBa
RBa
RAb
RAb
A10
A0~A9
CBa
RAa
CAa
CAb
t
t
t
t
RCD
DPL
DPL
RP
DQM
DQ
Hi-Z
DAa4
DAa3
DAa5 DAa6 DAa7 DBa0 DBa1
DAb1
DAb2 DAb3
DBb7 DAb0
DAa0 DAa1
DBa2 DBa3
QBa5 DBa6
DAa2
DBa4
Write
Command
Bank A
Precharge
Command
Bank A
Activate
Command
Bank A
Activate
Command
Bank A
Precharge
Command
Bank B
Write
Command
Bank B
Activate
Command
Bank B
Write
Command
Bank A
Document:1G5-0160
Rev.1
Page 49