Preliminary
VG3617161DT
16Mb CMOS Synchronous Dynamic RAM
VIS
2.5 Command Truth Table for CKE
CKE
n-1
RAS CS RAS
n
Current state
CAS
WE
Address
Action
Notes
H
L
L
L
L
L
H
X
H
H
H
H
L
X
H
L
X
X
H
H
L
Self refresh
(S.R.)
X
X
H
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
INVALID,CLK(n-1)would exit S.R.
S.R. Recovery
S.R. Recovery
ILLEGAL
ILLEGAL
Maintain S.R.
2
2
2
2
L
L
X
H
X
X
H
Self refresh
recovery
Idle after tRC
H
H
L
H
H
X
X
Idle after tRC
H
H
H
H
H
H
L
H
H
L
L
L
H
L
L
X
X
H
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
ILLEGAL
ILLEGAL
Begin clock suspend next cycle
Begin clock suspend next cycle
ILLEGAL
H
L
X
H
H
L
5
5
L
L
L
L
L
ILLEGAL
H
L
X
X
X
X
X
X
X
X
Exit clock suspend next cycle
Maintain clock suspend
INVALID, CLK(n-1) would exit P.D.
2
2
L
H
L
X
H
Power down
(P.D.)
X
X
EXIT P D ® Idle
·
·
L
L
X
H
X
X
X
X
X
X
Maintain power down mode
Refer to operations in Operative
Command Table
H
H
Both banks
idle
H
H
H
H
L
L
H
L
X
H
X
X
Refer to operations in Operative
Command Table
Refer to operation in Operative
Command Table
H
H
H
H
L
L
L
L
L
L
H
L
X
Op-
Code
Refresh
Refer to operations in Operative
Command Table
H
H
H
L
L
L
H
L
L
X
H
L
X
X
H
X
X
X
Refer to operations in Operative
Command Table
Refer to operations in Operative
Command Table
Refer to operations in Operative
Command Table
H
H
L
L
L
L
L
L
L
L
H
L
X
Op-
Code
Self refresh
Refer to operations in Operative
Command Table
3
L
X
H
X
X
X
X
X
X
X
X
X
X
Power down
Refer to operations in Operative
Command Table
Begin clock suspend next cycle
Exit clock suspend next cycle
Maintain clock suspend
3
4
H
Any state
other than
listed above
H
L
L
L
H
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Note 1. H : Hight level, L : low level, X : High or low level(Don't care).
2. CKE Low to High transition will re-enable CLK and other inputs asynchronously. A minimum setup time must be satisfied
before any command other than EXIT.
3. Power down and Self refresh can be entered only from the both banks idle state.
4. Must be legal command as defined in Operative Command Table.
5 .IIIegal if tSRX is not satisfied.
Document:1G5-0160
Rev.1
Page 14
VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
