VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
High Performance Serial
Backplane Transceiver
VSC870
The IDLE word acts as a null word. The transceivers ignore these words at the transmit side. If there is no valid
word at the transmit side, the signal TXEN should be set LOW. When the transceiver is loaded with IDLE words at
the parallel transmit side, the transceiver will formulate its own IDLE word and send it through the serial output. At
the receiving side, the transceiver sets the RXWA signal LOW if it receives an IDLE word from the serial line. IDLE
words contain switch connection information that may be used by external logic. This information is also used for
automatic packet retransmission as discussed in section 2.3.6. The connection information is in the same format as
shown in section 2.2.4 below. The next CRQ word will also be forwarded through the switch to the current receiving
port card. These can be ignored.
2.2.2 Header Word Format at the Transceiver Parallel Interface
The header word format at the transceiver parallel interface is shown below. A maximum of 20 bits can be used
to send data to the receiving port card. These bits can contain the first bytes of the data packet or other information.
For a NULL header word, these bits are all X’s.
31 30 29 28
X X X X
27 26 25 24
X X X X
23 22 21 20
19 18 17 16
15 14 13 12
11 10 09 08
07 06 05 04
03 02 01 00
X X X X
D D D D
19 18 17 16
D D D D
15 14 13 12
D D D D
11 10 09 08
D D D D
07 06 05 04
D D D D
03 02 01 00
--------------- Data Payload ---------------
Where:
D[19:0]20 bit data payload
2.2.3 Header word Format on the Serial Data Lines
The header word format as seen at the serial output of the transceiver or switch chip is shown below. Two
overhead bits are added to designate a header word to the receiving chip. The serial data is transmitted with the MSB
first.
33 32
31 30 29 28
0 B B 1
27 26 25 24
0 1 1 0
23 22 21 20
19 18 17 16
15 14 13 12
11 10 09 08
07 06 05 04
03 02 01 00
1 0 1 0
A A
1 0
D D D D
19 18 17 16
D D D D
15 14 13 12
D D D D
11 10 09 08
D D D D
07 06 05 04
D D D D
03 02 01 00
1
0
--------------- Data Payload ----------------
Where:
A[1:0]11=to switch chip, 00=from switch chip
B[1:0]00=Undefined,
01=Flow control channel,
10=Flow control channel,
11=Acknowledge
D[19:0]20 bit data payload
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Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Page 14
G52190-0, Rev 4.1
01/05/01
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
