VSC864A-2
VITESSE
Data Sheet
Figure 4: Write Mode
A address setup and hold rela-
tive to LOCAL STROBE.
t
ALSSU
t
LS
t
ALSH
t
LSL
200 Mb/s 64 x 64
Crosspoint Switch
A
0
- A
5
LOCAL
STROBE
D
0
- D
5
, TRI
t
DLSSU
t
DLSH
t
GLSU
t
GS
t
GLH
D data setup and hold relative
to LOCAL STROBE.
GLOBAL
STROBE
Z (output data)
LOCAL STROBE to GLO-
BAL STROBE timing rela-
tionship.
CLOCKED MODE - GLO-
BAL STROBE to CLK tim-
ing relationship.
t
GSZ
CLK
t
CGSU
t
GCL
Figure 5: Read Mode
S
0
- S
5
TEST
STROBE
O
0
- O
6
t
TSQ
t
STSU
t
TS
t
STH
Figure 6: Block Diagram of Internal Write Mode Circuits
D BUS
Holding
Latch
CK
Control
Latch
CK
To 64:1 Mux
Select Lines
LOCAL
STROBE
A BUS
Decoder
GLOBAL
STROBE
Page 6
®
VITESSE
Semiconductor Corporation
G52132-0 Rev. 2.0