VITESSE
SEMICONDUCTOR CORPORATION
Multi-Rate SONET/SDH
Clock and Data Recovery IC
Figure 5: High-Speed Clock and Data Outputs
Data Sheet
VSC8122
80%
Data Output
20%
t
R
, t
F
t
PD
80%
Clock Output
20%
t
R
t
F
Table 4: High-Speed Inputs and Outputs
Parameters
∆V
OD
∆V
OC
V
CMO
V
DIFF
R
IN
Description
Data output voltage swing
Clock output voltage swing
Common-mode range (DO/CO)
Serial input absolute voltage, single
ended peak-to-peak swing (V
IH
-
V
IL
) for DI +/-
Input resistance between DI+ and
V
TERM
or DI- and V
TERM
Min
600
500
2.6
250
43
Typ
900
700
—
—
—
Max
1000
1000
3.2
1200
58
Units
mV
mV
V
mV
Ω
Conditions
AC-coupled
Table 5: PLL Parameters
Parameters
Description
REF_CLK Duty Cycle
REF_CLK Frequency Range
V
IH
V
IL
REF_CLK Input High Voltage
REF_CLK Input Low Voltage
Min
45
-100
V
CC
-
1.165
V
CC
-
2.0
Typ
—
—
—
—
Max
55
+100
V
CC
-
0.7
V
CC
-
1.475
Units
%
ppm
V
V
Conditions
Page 6
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VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
G52228-0, Rev 4.1
01/05/01