VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
Multi-Rate SONET/SDH
VSC8122
Clock and Data Recovery IC
Two sets of reference frequencies for the VSC8122 are shown in Table 2. SONET reference clock frequen-
cies are as indicated, with Gigabit Ethernet frequencies listed in parenthesis. The two different sets of reference
clocks are needed since the reference clock for SONET and Gigabit Ethernet applications will be slightly differ-
ent. Internally, the VSC8122 requires a 19.44MHz reference (or 19.53MHz reference for Gigabit Ethernet). The
customer can select to provide either the 19.44MHz reference (or 19.53MHz reference for Gigabit Ethernet), or
the 2x, 4x or 8x of that reference at 38.88MHz (39.06MHz), 77.76MHz (78.13MHz) or 155MHz (156.25MHz).
The REF_SEL[1:0] inputs will program the internal divider as required to use the selected REFCK frequency.
Two reference clock inputs are provided, REFCK1 and REFCK0, to allow “on-the-fly switching” between
SONET and Gigabit Ethernet applications if desired. Since SONET and Gigabit Ethernet require different refer-
ence clock frequencies, the VSC8122 allows the user to toggle between the two reference clock frequencies
(REFCK1 and REFCK0) to supply the appropriate input clock. REF_INPUTSEL is used to toggle between the
two reference clock input frequencies; REF_INPUTSEL= “0” selects REFCK0 and REF_INPUTSEL= “1”
selects REFCK1. Either reference clock input (REFCK1, REFCK0) can be used for SONET or Gigabit Ethernet
reference frequencies. LVPECL levels are recommended for REFCK inputs (see Figure 4). If a reference clock
is unused, it is recommended that one of its inputs be tied to V through a 5.1kΩ resistor, the other one to
CC
GND through a 5.1kΩ resistor.
Figure 4: REFCK Input Levels
LVPECL Level REFCK Inputs (recommended)
NON- LVPECL Level REFCK Inputs
0.1µf
REFCK0 /
VSC8122
REFCK1
REFCK0 /
REFCK1
VSC8122
50Ω
50Ω
(1, 2)
VCC-2(1)
VTERM
NOTES: (1) For differential REFCK input signals, 100Ω termination between true and complement REFCK signals can be
substituted for the 50Ω to V termination on each line.
TERM
(2) With the input ac-coupled, V
can be to any power supply required for the upstream device.
TERM
© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Page 4
G52228-0, Rev 4.1
01/05/01
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
