VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
2.488GHz SONET/SDH
Clock Generator
VSC8121
Revision History
Rev
No.
Section/Figure/
Page
Item
Date
Description
Table
1
2
4.1
4.1
2/4/00
2/4/00
General Description
Features
1
1
Add CML text to the clock output, Deleted PECL output
Changed to High-Speed clock output
Add High-Speed CML outputs, Deleted PECL/ECL
clock outputs
3
4
5
4.1
4.1
4.1
2/4/00
2/4/00
2/4/00
Application Info
Figure 3
2
3
6
Changed to High-Speed CML Clock output terminations
Changed to High-Speed Differential outputs, deleted the
PECL/ECL outputs
Table 4
6
7
8
4.1
4.1
4.1
2/4/00
2/4/00
2/4/00
Table 6
Table 7
Figure
9,10
12
Added Level Column to I/O’s
Changed Theta Juntion to Case to 2.0
Changed CH3 to Trigger
16
© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Page 18
G52163-0, Rev 4.2
04/16/01
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
