VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
ATM/SONET/SDH 622 Mb/s Transceiver Mux/Demux
with Integrated Clock Generation and Clock Recovery
VSC8113
Table 17: Pin Definitions
Signal
VDD
Pin
I/O
Level
Pin Description
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
+3.3V
+3.3V Power Supply
No connection
N/C
RX50MCK
VSS
O
TTL
GND
TTL
Constant 51.84MHz ref clock output, derived from the CMU
Ground
RXOUT0
RXOUT1
VSS
O
O
Receive output data bit0
Receive output data bit1
Ground
TTL
GND
TTL
RXOUT2
RXOUT3
VSS
O
O
Receive output data bit2
Receive output data bit3
Ground
TTL
GND
TTL
RXOUT4
RXOUT5
VSS
O
O
Receive output data bit4
Receive output data bit5
Ground
TTL
GND
TTL
RXOUT6
RXOUT7
VSS
O
O
Receive output data bit6
Receive output data bit7
Ground
TTL
GND
TTL
RXLSCKOUT
FP
O
O
Receive byte clock output
Frame detection pulse
TTL
VDD
+3.3V
TTL
+3.3V Power Supply
LOSOUT
CRUREFCLK
LOSTTL
LOSPECL
VDD
O
I
Loss of Signal alarm indicator
Optional external CRU reference clock @77.76MHz
Loss of Signal Control - TTL input
Loss of Signal Control- Single ended PECL input
+3.3V Power Supply
TTL
I
TTL
I
PECL
+3.3V
GND
TTL
VSS
Ground
REFCLK
LOOPTIM1
VDD
I
I
Reference clock input, refer to table 12
Enable loop timing operation; active HIGH
+3.3V Power Supply
TTL
+3.3V
GND
GND
VSSA
Analog Ground (CMU)
Analog Ground (CMU)
No connection
VSSA
N/C
VDDA
CP1
+3.3V
Analog Power Supply (CMU)
CMU external capacitor (see Figure 6, and Table 1)
Analog
Page 18
VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52154-0, Rev 4.2
3/19/99
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
