VITESSE
SEMICONDUCTOR CORPORATION
2.5Gb/s 16-Bit
Multiplexer/Demultiplexer Chipset
Data Sheet
VSC8061/VSC8062
DC Characteristics
Table 3: ECL Inputs and Outputs
(Over recommended operating conditions with internal V
REF,
V
CC
= GND, output load = 50Ω to -2.0V).
Parameter
V
OH
V
OL
V
IH
V
IL
∆VECL
OUT
∆VECL
IN
Description
Output HIGH voltage
Output LOW voltage
Input HIGH voltage
Input LOW voltage
Output voltage swing
Input voltage swing
Min
-1100
V
TT
-1040
V
TT
0.850
0.600
Typ
Max
-700
-1750
-600
-1600
Units
mV
mV
mV
mV
V
Conditions
V
IN
= V
IH
(max) or V
IL
(min)
V
IN
= V
IH
(max) or V
IL
(min)
Guaranteed HIGH signal
for all inputs
Guaranteed LOW signal
for all inputs
Output load 50Ω to V
TT
AC-coupled
0.800
1.2
V
Note: Differential ECL output pins must be terminated identically.
Table 4: Power Dissipation
(Over recommended operating conditions, V
CC
= GND, outputs open circuit)
Parameter
I
EE
I
TT
P
D
Description
Power supply current from V
EE
Power supply current from V
TT
Power dissipation
VSC8061
VSC8062
VSC8061
VSC8062
VSC8061
VSC8062
Min
Typ
Max
260
220
260
230
2.0
1.7
Units
mV
mV
mV
mV
W
W
Conditions
Table 5: High-Speed Input and Output Specifications
(Over recommended operating conditions, V
CC
= GND, output load = 50Ω to -2.0V)
Parameter
∆V
HSOUT
∆V
HSIN
t
R
, t
F
Description
Output voltage swing
Input voltage swing
Input voltage rise and fall time (high-speed)
Min
0.7
Typ
0.9
Max
Units
V
Conditions
Output load, 50Ω to -2.0V
AC-coupled
Same for all data rates; no
worse than sine wave at
max speed
See Table 6
0.2
1.5
ns
NOTES: (1) Built-in references generator, the high-speed inputs are designed for AC-coupling.
(2) If a high-speed input is driven single-ended, a capacitor should be connected between the unused high-speed or complement
input and V
TT
(see Figures 7 and 8).
Page 6
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
G52069-0, Rev 4.3
05/11/01