VITESSE
SEMICONDUCTOR CORPORATION
Datasheet
2.488 Gb/s ATM/SDH/SONET STM-16/STS-48
VSC8025/VSC8026
Mux/Demux and Section Terminator IC Chipset
Table 16: Pin Identification Table
Signal
Pin
I/O
Level
Pin Description
FPPAREN
RXFPOUT
DISDSCRM
SELSTS48C
VCC
R15
R16
T01
T02
T03
T04
T05
T06
T07
T08
T09
T10
T11
T12
T13
T14
T15
T16
I
O
TTL
TTL
TTL
TTL
GND
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
-2V
Frame pulse included in parity enable
Receive frame pulse out
Disable descramble mode (active high)
STS-48c mode (active high)
Ground
I
I
PWR
O
RXOUTA0
RXOUTA1
RXOUTA3
RXOUTA5
RXOUTA7
RXOUTB0
RXOUTB2
RXOUTB4
RXOUTB6
RXOUTB7
VTT
Parallel output bus data A
Parallel output bus data A
Parallel output bus data A
Parallel output bus data A
Parallel output bus data A
Parallel output bus data B
Parallel output bus data B
Parallel output bus data B
Parallel output bus data B
Parallel output bus data B
-2.0V power supply
O
O
O
O
O
O
O
O
O
PWR
N/C
No connection (leave open)
Test input (tie to -2V)
VSCIPNC
I
ECL
Page 32
VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52182-0, Rev. 4.0
1/5/00
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
