VSC6134
Datasheet
Table 55. Signal Fail Configuration
OTUk_BDISF[1:0]
Description
00
01
10
11
Neither OTUk LOS or OTUk LOF cause BDI to be set high
Only OTUk LOS causes BDI to be set high
Only OTUk LOF causes BDI to be set high
Either OTUk LOS or OTUk LOF cause BDI to be set high
OTUk_BDI_MANU manually forces SMBDI, PMBDI, and selectively generated TCMBDI in the
backwards direction.
2.9.5.17
BEI Transmission to the DW Overhead Generator
On each frame, the overhead monitor passes internal signals OTUk_SMBEI[3:0],
OTUk_TCMBEI[3:0], and OTUk_SMBEI[3:0] to the overhead generator block for insertion into SM,
TCMn, and PM BEI in the backwards direction. Each BEI is the number of bit interleaved parity errors
detected and, in the case of OTUk_SMBEI[3:0] and OTUk_TCMBEI[3:0], may also signal an encoded
BIAE signal (1011).
SM IAE detection may automatically signal BIAE in OTUk_SMBEI if OTUk_SM_BIAEAUTO is set
to 1. Setting OTUk_SM_BIAEMANU to 1 forces OTUk_SMBEI to signal BIAE.
TCM IAE detection may automatically signal BIAE in OTUk_TCMBEI if OTUk_TCM_BIAEAUTO is
set to 1. Setting OTUk_TCM_BIAEMANU to 1 forces OTUk_TCMBEI to signal BIAE.
2.9.6
DW Overhead Processor and FEC Performance Monitor Register
Information
For information about the digital wrapper overhead processor and FEC performance monitor registers,
see “Digital Wrapper Overhead Processor and FEC Performance Monitor Registers,” page 280.
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VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
