DG534A/538A
Vishay Siliconix
TRUTH TABLE
I/O
X
X
X
0
0
0
0
0
0
0
0
0
0
0
0
1
DG538A
8/4
a
1
X
X
0
0
0
0
0
0
0
0
1
1
1
1
Note c
Maintains previous state
None (latches cleared)
None
S
A1
S
A2
S
A3
S
A4
S
B1
S
B2
S
B3
S
B4
S
A1
and S
B1
S
A2
and S
B2
S
A3
and S
B3
S
A4
and S
B4
D
A
and D
B
should be
connected externally
Latches Transparent
A
2
X
X
X
0
0
0
0
1
1
1
1
X
X
X
X
A
1
X
X
X
0
0
1
1
0
0
1
1
0
0
1
1
Note b
A
0
X
X
X
0
1
0
1
0
1
0
1
0
1
0
1
EN
X
X
0
1
1
1
1
1
1
1
1
1
1
1
1
WR
X
0
0
0
0
0
0
0
0
0
0
0
0
0
1
RS
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
On Switch
Logic “0” = V
AL
v
0.8 V
Logic “1” = V
AH
w
2 V
X = Don’t Care
Notes:
a. Connect D
A
and D
B
together externally for single-ended operation.
b. With I/O high, A
n
and EN pins become outputs and reflect latch contents. See timing diagrams for more detail.
c. 8/4 can be either “1” or “0” but should not change during these operations.
ORDERING INFORMATION
Temperature Range
Package
Part Number
DG534A
–40 to 85_C
_
–55 to 125_C
20-Pin Plastic DIP
20-Pin PLCC
20-Pin Sidebraze
DG534ADJ
DG534ADN
DG534AAP/883, 5962-906021MRC
DG538A
–40 to 85_C
_
–55 to 125_C
28-Pin Plastic DIP
28-Pin PLCC
28-Pin Sidebraze
DG538ADJ
DG538ADN
DG538AAP/883, 5962-8976001MXA
Document Number: 70069
S-05734—Rev. G, 29-Jan-02
www.vishay.com
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