BCM400x500y1K8A3z
This is similar in form to Eq. (3), where RSEC is used to represent the
characteristic impedance of the SAC™. However, in this case a real R on
the primary side of the SAC is effectively scaled by K2 with respect
to the secondary.
Low impedance is a key requirement for powering a high-current, low-
voltage load efficiently. A switching regulation stage should have
minimal impedance while simultaneously providing appropriate
filtering for any switched current. The use of a SAC between the
regulation stage and the point of load provides a dual benefit of scaling
down series impedance leading back to the source and scaling up shunt
capacitance or energy storage as a function of its K factor squared.
However, the benefits are not useful if the series impedance of the SAC
is too high. The impedance of the SAC must be low, i.e. well beyond the
crossover frequency of the system.
Assuming that R = 1 Ω, the effective R as seen from the secondary side is 16
mΩ, with K = 1/8 .
A similar exercise should be performed with the additon of a capacitor
or shunt impedance at the primary input to the SAC. A switch in series
with VPRI is added to the circuit. This is depicted in Figure 18.
A solution for keeping the impedance of the SAC low involves
switching at a high frequency. This enables small magnetic components
because magnetizing currents remain low. Small magnetics mean small
path lengths for turns. Use of low loss core material at high frequencies
also reduces core losses.
S
S
SAC™
SAC
The two main terms of power loss in the BCM module are:
V
Vout
K = 1/8
SEC
+
–
C
C
K = 1/32
V
Vin
PRI
n
No load power dissipation (PPRI_NL): defined as the power
used to power up the module with an enabled powertrain
at no load.
n
Resistive loss (RSEC): refers to the power loss across
the BCM® module modeled as pure resistive impedance.
Figure 18 — Sine Amplitude Converter with input capacitor
PDISSIPATED= PPRI_NL + PRSEC
(10)
A change in VPRI with the switch closed would result in a change in
capacitor current according to the following equation:
Therefore,
PSEC_OUT = PPRI_IN – PDISSIPATED = PRI_IN – PPRI_NL – PRSEC (11)
dVPRI
dt
(7)
IC(t) = C
The above relations can be combined to calculate the overall module
efficiency:
Assume that with the capacitor charged to VPRI, the switch is opened
and the capacitor is discharged through the idealized SAC. In this case,
PSEC_OUT
P
PRI_IN – PPRI_NL – PRSEC
=
(12)
h =
•
PIN
PIN
IC= ISEC
K
(8)
substituting Eq. (1) and (8) into Eq. (7) reveals:
2
VPRI
I
PRI – PPRI_NL – (ISEC
)
R
•
SEC
•
•
=
C
K2
dISEC
dt
(9)
ISEC
=
VIN
I
IN
•
The equation in terms of the output has yielded a K2 scaling factor for
C, specified in the denominator of the equation.
2
PPRI_NL + (ISEC
)
R
•
SEC
= 1 –
(
)
VPRI IPRI
•
A K factor less than unity results in an effectively larger capacitance on
the secondary output when expressed in terms of the input. With a
K= 1/8 as shown in Figure 18, C=1 μF would appear as C=64 μF when
viewed from the secondary.
BCM® Bus Converter
Page 20 of 25
Rev 1.4
07/2015
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