CD-700-SYNCE-25M0000000
Complete VCXO Based Phase Lock Loop
For Synchronous Ethernet Jitter Attenuation
CD-700
Description
The VI CD-700 is a user-configurable crystal based PLL integrated circuit. It includes a digital phase detector, op-amp, VCXO
and additional integrated functions for use in digital synchronization applications. Loop filter software is available as well SPICE
models for circuit simulation.
Features
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5 x 7.5 x 2 mm, smallest VCXO PLL available
Two Output Frequencies (25 MHz and 50 MHz)
Integrated Phase Jitter < 600 fsec
5.0 or 3.3 Vdc operation
Tri-State Output
Holdover on Loss of Signal Alarm
VCXO with CMOS outputs
–40/85 0C temperature range
Hermetically sealed ceramic SMD package
Applications
• Jitter Attenuation
• Clock Smoothing
• Synchronous Ethernet, G.8262
Block Diagram
LOS
(8)
PHO OPN
(3)
(2)
OPOUT VC
(1)
(16)
LOSIN
(4)
DATAIN
(5)
CLKIN
(6)
Phase Detector and
LOS
VCXO
OUT1
(13)
Optional 2nd divider
OUT2
(11)
RCLK
(9)
RDATA
(10)
OPP
(15)
GND VDD
(7) (14)
HIZ
(12)
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Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Rev: 15Dec2009