80W Power Packaged Transistor
Simulated Source and Load Impedance
The device is composed of 2 independent transistors.
V
DS
=50V, I
D_Q
=600mA (300mA on each transistor)
CHK080A-SRA
Zsource
Zload
Zsource
Zload
Frequency (MHz)
500
1000
2000
3000
3500
Source
1 + j4.5
1 + j1.9
1.3 - j1.9
1.4 - j4.8
0.8 - j6.7
Load
21.6 + j7
15.3 + j14.3
5 + j7.9
2.8 + j2.3
2.3 + j0.2
These values are relative to each transistor and are given in the reference plane defined by
the connection between the package leads and the PCB. A gap of 200µm is considered
between the edge of the package and the PCB.
Ref. : DSCHK080A-SRA3148 - 28 Jun 13
4/14
Specifications subject to change without notice
Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
UMS [ UNITED MONOLITHIC SEMICONDUCTORS ]
