CHA3689
Chip Biasing options
12.5-30GHz Low Noise Amplifier
This chip is self-biased, and flexibility is provided by the access to number of pads. The
internal DC electrical schematic is given in order to use these pads in a safe way.
Vd1
1.34k
0.4k
42
3k
0.42k
Vd2
3k
5
0.42k
Vd3
3.3
RFin
112
11.6
B
RFout
20
9.9
D
13.4
The requirement is not to exceed Vds = 3.5Volt ( internal Drain to Source voltage ).
We propose two standard biasing:
•
Low Noise and low consumption:
Vd = 4V and B, D not connected (NC).
Idd = 90mA & Pout-1dB = 14dBm Typical.
Vd = 4V and B, D grounded.
Idd = 120mA & Pout-1dB = 15dBm Typical.
•
Low Noise and higher output power:
Ordering Information
Chip form :
CHA3689-99F/00
Information furnished is believed to be accurate and reliable. However
United Monolithic Semiconductors
S.A.S.
assumes no responsibility for the consequences of use of such information nor for any infringement of
patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of
United Monolithic Semiconductors S.A.S..
Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all
information previously supplied.
United Monolithic Semiconductors S.A.S.
products are not authorised for use
as critical components in life support devices or systems without express written approval from
United Monolithic
Semiconductors S.A.S.
Ref. : DSCHA36897082 - 23 Mar 07
10/10
Specifications subject to change without notice
United Monolithic Semiconductors S.A.S.
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