TQP3M9006
High Linearity LNA Gain Block
Pin Description
Pin
Symbol
Description
2
RF Input
Input, matched to 50 ohms. External DC Block is required.
11
Vdd / RFout
Output, matched to 50 ohms, External DC Block is required and supply voltage.
These pins are not connected internally but are recommended to be grounded on the PCB
for optimal isolation.
Backside Paddle. Multiple vias should be employed to minimize inductance and thermal
resistance; see page 7 for mounting configuration.
All other pins GND
GND Paddle
Applications Information
PC Board Layout
Top RF layer is .014” NELCO N4000-13, єr = 3.9, 4 total layers (0.062”
thick) for mechanical rigidity. Metal layers are 1-oz copper. 50 ohm
Microstrip line details: width = .029”, spacing = .035”
The pad pattern shown has been developed and tested for optimized
assembly at TriQuint Semiconductor. The PCB land pattern has been
developed to accommodate lead and package tolerances. Since surface
mount processes vary from company to company, careful process
development is recommended.
For further technical information, Refer to www.TriQuint.com
Data Sheet: Rev C 05/26/11
- 7 of 9 -
Disclaimer: Subject to change without notice
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© 2011 TriQuint Semiconductor, Inc.