欢迎访问ic37.com |
会员登录 免费注册
发布采购

TA2024B 参数 Datasheet PDF下载

TA2024B图片预览
型号: TA2024B
PDF下载: 下载PDF文件 查看货源
内容描述: 立体声15W ( 4з ) CLASS- T⑩数字音频功放采用数字电源PROCESSING⑩技术 [STEREO 15W (4з) CLASS-T⑩ DIGITAL AUDIO AMPLIFIER USING DIGITAL POWER PROCESSING⑩ TECHNOLOGY]
分类和应用: 放大器
文件页数/大小: 14 页 / 539 K
品牌: TRIPATH [ TRIPATH TECHNOLOGY INC. ]
 浏览型号TA2024B的Datasheet PDF文件第1页浏览型号TA2024B的Datasheet PDF文件第2页浏览型号TA2024B的Datasheet PDF文件第3页浏览型号TA2024B的Datasheet PDF文件第5页浏览型号TA2024B的Datasheet PDF文件第6页浏览型号TA2024B的Datasheet PDF文件第7页浏览型号TA2024B的Datasheet PDF文件第8页浏览型号TA2024B的Datasheet PDF文件第9页  
Tripath Technology, Inc. - Technical Information  
P I N D E S C R I P T I O N  
Pin  
Function  
Description  
Charge pump switching pins. DCAP1 (pin 3) is a free running 300kHz square  
wave between VDDA and DGND (12Vpp nominal). DCAP2 (pin 2) is level shifted  
10 volts above DCAP1 (pin 3) with the same amplitude (12Vpp nominal),  
frequency, and phase as DCAP1.  
2, 3  
DCAP2, DCAP1  
4, 9  
5, 8,  
17  
V5D, V5A  
AGND1, AGND2,  
AGND3  
Digital 5VDC, Analog 5VDC  
Analog Ground  
6
7
REF  
Internal reference voltage; approximately 1.0 VDC.  
A logic low output indicates the input signal has overloaded the amplifier.  
Input stage output pins.  
Single-ended inputs. Inputs are a “virtual” ground of an inverting opamp with  
approximately 2.4VDC bias.  
OVERLOADB  
OAOUT1, OAOUT2  
INV1, INV2  
10, 14  
11, 15  
12  
MUTE  
When set to logic high, both amplifiers are muted and in idle mode. When low  
(grounded), both amplifiers are fully operational. If left floating, the device stays in  
the mute mode. This pin should be tied to GND if not used.  
Input stage bias voltage (approximately 2.4VDC).  
When set to logic high, device goes into low power mode. If not used, this pin  
should be grounded  
16  
18  
BIASCAP  
SLEEP  
19  
FAULT  
A logic high output indicates thermal overload, or an output is shorted to ground,  
or another output.  
20, 35  
22  
PGND2, PGND1  
DGND  
OUTP2 & OUTM2;  
OUTP1 & OUTM1  
VDD2, VDD2  
VDD1, VDD1  
NC  
Power Grounds (high current)  
Digital Ground. Connect to AGND locally (near the TA2024B).  
Bridged output pairs  
24, 27;  
31, 28  
25, 26,  
29, 30  
13, 21,  
23, 32,  
34  
Supply pins for high current H-bridges, nominally 12VDC.  
Not connected. Not bonded internally.  
33  
VDDA  
CPUMP  
5VGEN  
Analog 12VDC  
36  
Charge pump output (nominally 10V above VDDA)  
Regulated 5VDC source used to supply power to the input section (pins 4 and 9).  
1
T A 2 0 2 4 B P I N O U T  
36-pin Power SOP Package  
(Top View)  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
CPUMP  
PGND1  
NC  
VDDA  
NC  
OUTP1  
VDD1  
VDD1  
OUTM1  
OUTM2  
VDD2  
VDD2  
OUTP2  
NC  
1
2
3
4
5
6
7
8
+5VGEN  
DCAP2  
DCAP1  
V5D  
AGND1  
REF  
OVERLOADB  
AGND2  
V5A  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
OAOUT1  
INV1  
MUTE  
NC  
OAOUT2  
INV2  
BIASCAP  
AGND3  
SLEEP  
DGND  
NC  
PGND2  
FAULT  
4
TA2024B –KL/1.2/01.06  
 复制成功!