TMC8462 Datasheet • Document Revision V1.4 • 2018-May -09
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6.4.10.3 EEPROM Control/Status (0x0502:0x0503)
Bit
Description
ECAT
PDI
Reset Value
0
ECAT write enable∗2:
r/(w)
r/-
0: Write requests are disabled
1: Write requests are enabled
This bit is always 1 if PDI has EEPROM control.
4:1
5
Reserved, write 0
r/-
r/-
r/-
r/-
EEPROM emulation:
0: Normal operation (I2C interface used)
1: PDI emulates EEPROM (I2C not used)
6
Supported number of EEPROM read bytes:
r/-
r/-
0: 4 Bytes
1: 8 Bytes
7
Selected EEPROM Algorithm:
r/-
r/-
0: 1 address byte (1KBit . . . 16KBit EEPROMs)
1: 2 address bytes (32KBit . . . 4 MBit EEPROMs)
r/[w]
10:8
Command register∗1:
r/(w)
r/(w)
r/[w]
Write: Initiate command.
Read: Currently executed command
Commands:
000: No command/EEPROM idle (clear error
bits)
001: Read
010: Write
100: Reload
Others: Reserved/invalid commands (do not
issue)
EEPROM emulation only: after execution, PDI
writes command value to indicate operation is
ready.
11
12
Checksum Error at in ESC Configuration Area:
0: Checksum ok
r/-
r/-
r/-
r/-
1: Checksum error
EEPROM loading status:
0: EEPROM loaded, device information ok
1: EEPROM not loaded, device information not
available (EEPROM loading in progress or fin-
ished with a failure)
13
Error Acknowledge/Command∗2:
0: No error
r/-
r/-
r/[w]
1: Missing EEPROM acknowledge or invalid
command
EEPROM emulation only: PDI writes 1 if a tem-
porary failure has occurred.
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