TMC8462 Datasheet • Document Revision V1.4 • 2018-May -09
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6.4.10 SII EEPROM Interface
Address
Length
(Byte)
Description
SII EEPROM Interface
EEPROM Configuration
EEPROM PDI Access State
EEPROM Control/Status
EEPROM Address
0x0500
1
1
0x0501
0x0502:0x0503
0x0504:0x0507
0x0508:0x050F
2
4
4/8
EEPROM Data
Table 56: SII EEPROM Interface Register Overview
6.4.10.1 EEPROM Configuration (0x0500)
Bit
Description
ECAT
PDI
Reset Value
0
EEPROM control is offered to PDI:
0: no
1: yes (PDI has EEPROM control)
r/w
r/-
1
Force ECAT access:
0: Do not change Bit 0x0501.0
1: Reset Bit 0x0501.0 to 0
r/w
r/w
r/-
r/-
7:2
Reserved, write 0
Table 57: Register 0x0500 (PROM Config)
6.4.10.2 EEPROM PDI Access State (0x0501)
Bit
Description
ECAT
PDI
Reset Value
0
Access to EEPROM:
r/-
r/(w)
0: PDI releases EEPROM access
1: PDI takes EEPROM access (PDI has EEPROM
control)
7:1
Reserved, write 0
r/-
r/-
Table 58: Register 0x0501 (PROM PDI Access)
Note
r/(w): write access is only possible if 0x0500.0=1 and 0x0500.1=0.
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