TMC8462 Datasheet • Document Revision V1.4 • 2018-May -09
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Name
Pin
Type (I,O,PU,PD) Function
Bus Interface 1 IOs (EtherCAT OUT Port)
TN1
K1
L1
G1
H1
L2
IO
IO
IO
IO
O
Negative pin of differential transmit output pair
TP1
Positive pin of differential transmit output pair
Negative pin of differential receive output pair
Positive pin of differential receive output pair
RN1
RP1
REGOUT1
Regulator power output, use a 10uF and 0.1uF
for filtering power noise
Test Pins only
TST_MODE
TST_ANA
RXCLK0
E5
D5
D2
G2
E2
H2
B2
K2
C2
J2
I
Test mode enable, connect to GND
Analog test output, leave open
Clock test pin, leave open
O
IO
RXCLK1
IO
Clock test pin, leave open
TXCLK0
IO
Clock test pin, leave open
TXCLK1
IO
Clock test pin, leave open
RXDV0
I, PD
I, PD
I, PD
I, PD
O
Test pin, leave open for normal operation
Test pin, leave open for normal operation
Test pin, leave open for normal operation
Test pin, leave open for normal operation
100MHz clock output
RXDV1
TXER0
TXER1
CLKO_100
L6
Table 2: Pin and Signal description for TMC8462-BA
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