TMC8462 Datasheet • Document Revision V1.4 • 2018-May -09
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Name
Pin
Type (I,O,PU,PD) Function
Process Data Interface IOs to/from MCU
PDI_SOF
H3
G3
L4
K3
L5
O
O
I
Ethernet Start-of-Frame if 1
Ethernet End-of-Frame if 1
PDI_EOF
PDI_SPI_CSN
PDI_SPI_SCK
PDI_SPI_MOSI
Chip select signal of the process data interface
Serial clock signal of the process data interface
I
I
Serial data out signal of the process data inter-
face
PDI_SPI_MISO
PDI_SPI_IRQ
K5
J3
O
O
Serial data in signal of the process data interface
Interrupt signal for primary process data inter-
face, connect to MCU
PDI_WDSTATE
G4
O
EtherCAT Watchdog state, 0: Expired, 1: Not ex-
pired
PDI_WDTRIGGER
PDI_EMULATION
F4
J7
O
EtherCAT Watchdog trigger if 1
I
Selects between PDI interface (SPI) or standalone
operation with state machine emulation inside
ESC. Has weak internal pull down. 0 = default,
PDI interface active, 1 = standalone operation,
state machine emulation in Slave Controller
MFC IO Control Interface IOs
MFC_CTRL_SPI_CSN
MFC_CTRL_SPI_SCK
D4
E4
I
I
I
Chip select signal of the MFC IO control interface
Serial clock signal of the MFC IO control interface
MFC_CTRL_SPI_MOSI C4
Serial data out signal of the MFC IO control inter-
face
MFC_CTRL_SPI_MISO E7
O
O
Serial data in signal of the MFC IO control inter-
face
MFC_IRQ
E6
C5
MFCIO block IRQ for configurable events, connect
to MCU, high active
MFC_NES
I
low active (not) Emergency Stop/Switch/Halt (to
bring PWM or other outputs into a safe state),
the event must be cleared actively, has weak in-
ternal pull down, must be driven high for normal
operation
PDI_SHARED_BUS
F9
I
Selects between separate SPI buses (MISO, MOSI,
SCK) or one SPI bus with two CS lines for the PDI
and MFC CTRL SPI interface: 0 = two separate SPI
buses, 1 = one shared SPI bus using the PDI_SPI_x
bus lines
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