TMC8462 Datasheet • Document Revision V1.4 • 2018-May -09
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7.3.5 PWM Unit
7.3.5.1 Register 36 – PWM_CFG
Bit
Description
ECAT
-/w
PDI
-/w
-/w
-/w
Range [Unit]
0. . . +(212) − 1
11:0
PWM max count
15:12 unused
-/w
18:16 PWM ch0 chopper mode
-/w
See Section 7.15 for more details.
19
unused
-/w
-/w
-/w
-/w
22:20 PWM ch1 chopper mode
See Section 7.15 for more details.
unused
26:24 PWM ch2 chopper mode
See Section 7.15 for more details.
unused
30:28 PWM ch3 chopper mode
See Section 7.15 for more details.
unused
23
-/w
-/w
-/w
-/w
27
-/w
-/w
-/w
-/w
31
-/w
-/w
-/w
-/w
-/w
-/w
-/w
-/w
33:32 PWM alignment for all PWM channels
39:34 unused
47:40 Signal Polarities for all PWM channels
Bit 40 = PWM low sides polarity
Bit 41 = PWM high sides polarity
Bit 42 = PWM AB pulses polarity
Bit 43 = PWM B pulses polarity
Bit 44 = PWM Center pulses polarity
Bit 45 = PWM A pulses polarity
Bit 46 = PWM Zero pulses polarity
47
unused
-/w
-/w
-/w
-/w
55:48 BBM low sides.
0. . . +(28) − 1
0. . . +(28) − 1
Brake before make time in terms of 100MHz
clock cycles for low side MOSFET control
63:56 BBM high sides.
-/w
-/w
Brake before make time in terms of 100MHz
clock cycles for high side MOSFET control
Table 161: MFC IO Register 36 – PWM_CFG
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