TMC5160 DATASHEET (Rev. 1.08 / 2018-NOV-19)
13
Pin
TQFP QFN
Type Function
Mode selection input. When tied low, the internal ramp
generator generates step pulses. When tied high, the STEP/DIR
inputs control the driver. SD_MODE=0 and SPI_MODE=0 enable
UART operation.
Mode selection input. When tied low with SD_MODE=1, the
chip is in standalone mode and pins have their CFG functions.
When tied high, the SPI interface is enabled. Integrated pull
down resistor.
SD_MODE
21
22
21
22
DI
DI
(pd)
SPI_MODE
Encoder B-channel input (when using internal ramp generator)
or
dcStep enable input (SD_MODE=1, SPI_MODE=1) – leave open
or tie to GND for normal operation in this mode (no dcStep).
Configuration input (SPI_MODE=0)
ENCB_DCEN_
CFG4
DI
(pd)
23
23
Encoder A-channel input (when using internal ramp generator)
or
dcStep gating input for axis synchronization (SD_MODE=1,
SPI_MODE=1) or
Configuration input (SPI_MODE=0)
Encoder N-channel input (SD_MODE=0) or
dcStep ready output (SD_MODE=1).
ENCA_DCIN_
CFG5
DI
(pd)
24
25
24
26
ENCN_DCO_
CFG6
DIO
With SD_MODE=0, pull to GND or VCC_IO, if the pin is not used
for an encoder.
Diagnostics output DIAG0.
Interrupt or STEP output for motion controller (SD_MODE=0,
SPI_MODE=1).
Use external pullup resistor with 47k or less in open drain
mode.
DIO
(pu+
pd)
DIAG0_SWN
DIAG1_SWP
26
27
27
28
Single wire I/O (negative) (only with SD_MODE=0 and
SPI_MODE=0)
Diagnostics output DIAG1.
Position compare or DIR output for motion controller
(SD_MODE=0, SPI_MODE=1).
Use external pullup resistor with 47k or less in open drain
mode.
DIO
(pd)
Single wire I/O (positive) (only with SD_MODE=0 and
SPI_MODE=0)
Enable input. The power stage becomes switched off (all
motor outputs floating) when this pin becomes driven to a
high level.
5V supply input for digital circuitry within chip. Provide 100nF
or bigger capacitor to GND (GND plane) near pin. Shall be
supplied by 5VOUT. A 2.2 or 3.3 Ohm resistor is recommended
for decoupling noise from 5VOUT. When using an external
supply, make sure, that VCC comes up before or in parallel to
5VOUT or VCC_IO, whichever comes up later!
Charge pump capacitor output.
DRV_ENN
VCC
28
29
29
30
DI
CPO
CPI
31
32
31
32
Charge pump capacitor input. Tie to CPO using 22nF 100V
capacitor.
Motor supply voltage. Provide filtering capacity near pin with
short loop to GND plane. Must be tied to the positive bridge
supply voltage.
VS
33
33
VCP
CA2
HA2
34
35
36
34
35
36
Charge pump voltage. Tie to VS using 100nF capacitor.
Bootstrap capacitor positive connection.
High side gate driver output.
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TRINAMIC [ TRINAMIC MOTION CONTROL GMBH & CO. KG. ]
