欢迎访问ic37.com |
会员登录 免费注册
发布采购

TMC2041-EVAL-KIT 参数 Datasheet PDF下载

TMC2041-EVAL-KIT图片预览
型号: TMC2041-EVAL-KIT
PDF下载: 下载PDF文件 查看货源
内容描述: [EVAL KIT FOR TMC2041]
分类和应用:
文件页数/大小: 65 页 / 2202 K
品牌: TRINAMIC [ TRINAMIC MOTION CONTROL GMBH & CO. KG. ]
 浏览型号TMC2041-EVAL-KIT的Datasheet PDF文件第16页浏览型号TMC2041-EVAL-KIT的Datasheet PDF文件第17页浏览型号TMC2041-EVAL-KIT的Datasheet PDF文件第18页浏览型号TMC2041-EVAL-KIT的Datasheet PDF文件第19页浏览型号TMC2041-EVAL-KIT的Datasheet PDF文件第21页浏览型号TMC2041-EVAL-KIT的Datasheet PDF文件第22页浏览型号TMC2041-EVAL-KIT的Datasheet PDF文件第23页浏览型号TMC2041-EVAL-KIT的Datasheet PDF文件第24页  
TMC2041 DATASHEET (Rev. 1.02 / 2017-MAY-16)  
20  
5.2 CRC Calculation  
An 8 bit CRC polynomial is used for checking both read and write access. It allows detection of up to  
eight single bit errors. The CRC8-ATM polynomial with an initial value of zero is applied LSB to MSB,  
including the sync- and addressing byte. The sync nibble is assumed to always be correct. The  
TMC2041 responds only to correctly transmitted datagrams containing its own slave address. It  
increases its datagram counter for each correctly received write access datagram.  
퐶푅퐶 = 푥8 + 푥2 + 푥1 + 푥0  
SERIAL CALCULATION EXAMPLE  
CRC = (CRC << 1) OR (CRC.7 XOR CRC.1 XOR CRC.0 XOR [new incoming bit])  
C-CODE EXAMPLE FOR CRC CALCULATION  
void swuart_calcCRC(UCHAR* datagram, UCHAR datagramLength)  
{
int i,j;  
UCHAR* crc = datagram + (datagramLength-1); // CRC located in last byte of message  
UCHAR currentByte;  
*crc = 0;  
for (i=0; i<(datagramLength-1); i++) {  
currentByte = datagram[i];  
// Execute for all bytes of a message  
// Retrieve a byte to be sent from Array  
for (j=0; j<8; j++) {  
if ((*crc >> 7) ^ (currentByte&0x01))  
// update CRC based result of XOR operation  
{
*crc = (*crc << 1) ^ 0x07;  
}
else  
{
*crc = (*crc << 1);  
}
currentByte = currentByte >> 1;  
} // for CRC bit  
} // for message byte  
}
5.3 UART Signals  
The UART interface on the TMC2041 has following signals:  
TMC2041 UART INTERFACE SIGNALS  
SWIOP  
SWION  
Non-inverted data input and output  
Inverted data input and output for use in differential transmission. Can be left open  
in a 5V IO voltage system. Tie to the half IO level voltage for best performance in a  
3.3V single wire non-differential application.  
NEXTADDR  
SDO  
Address increment pin for sequential addressing scheme  
Configuration input: Tie low for standard mode!  
In UART mode (SW_SEL high) the slave checks the single wire SWIOP and SWION for correctly  
received datagrams with its own address continuously. Both signals are switched as input during this  
time. It adapts to the baud rate based on the sync nibble, as described before. In case of a read  
access, it switches on its output drivers on SWIOP and SWION and sends its response using the same  
baud rate.  
www.trinamic.com  
 复制成功!