XC61F
Series
■Marking
GSOT-23,
SOT-89
q w e r
w
q
r
e
SOT-23
(TOP VIEW)
SOT-89
(TOP VIEW)
2
VOLTAGE (V)
0.
w
1.
w
2.
w
3.
w
4.
w
5.
w
6.
w
N-channel open drain (XC61FN series)
DESIGNATOR
CONFIGURATION
VOLTAGE (V)
N-ch
K
0.
w
N-ch
L
1.
w
N-ch
M
2.
w
N-ch
N
3.
w
N-ch
P
4.
w
N-ch
5.
w
R
6.
w
N-ch
S
e
Indicates the presence of delay time
DESIGNATOR
5
6
7
DELAY TIME
50 to 200ms
80 to 400ms
1 to 50ms
q
Represents the integer of the Detect Voltage and the Output Configuration
CMOS output (XC61FC series)
DESIGNATOR
CONFIGURATION
CMOS
A
CMOS
B
CMOS
C
CMOS
D
CMOS
E
CMOS
F
CMOS
H
w
Represents the decimal number of the Detect Voltage
DESIGNATOR VOLTAGE (V) DESIGNATOR VOLTAGE (V)
q
.5
q
.0
5
0
q
.6
q
.1
6
1
q
.7
q
.2
7
2
q
.3
q
.8
8
3
q
.9
q
.4
9
4
r
Represents the assembly lot no.
Based on internal standards
GTO-92
q
Represents the output
configuration
DESIGNATOR OUTPUT CONFIGURATION
2 3 4 5
L
6 7
2 3 4 5
6 7
w
Represents the Detect Voltage
w
Re
DESIGNATOR
D
61C
1
61C
1
w
3
5
w
3
5
e
3
0
VOLTAGE（V）
3.3
5.0
C
N
CMOS
N-ch
r
Indicates Delay Time
DESIGNATOR
1
4
TO-92（L Type）
(TOP VIEW)
TO-92（T Type）
(TOP VIEW)
DELAY TIME
50ms∼200ms
80ms∼400ms
1ms∼50ms
5
t
Represents the Detect Voltage Accuracy
DESIGNATOR
DETECT VOLTAGE ACCURACY
within
±2%
y
Represents a least significant digit of
the produced year
DESIGNATOR PRODUCED YEAR
0
1
2000
2001
2
u
Denotes the production lot number
0 to 9, A to Z repeated(G.I.J.O.Q.W excepted)
161
TOREX [ TOREX SEMICONDUCTOR ]
