TTP259
TonTouchTM
Preliminary
for TCP2. At the same time, interrupt request flag TCPxF will set activated, if
software enables the corresponding interrupt enable bit, INT hardware will
cause MCU interrupt service routine.
.Counter
Counter feature is implemented only by TCPxLD=0, the TCPxD can be zero
or not that depends on software needs. User starts and stops the counter by
changing the TCPxEN bit value. On the save side, reading the counter value
after stopping the count by disable TCPxEN=0, if reading the counter value
during value changing that means clock in happening at the same time. The
reading of counter value may disrupt for transient state. If 8-bit counter is not
enough for counting, user can enable the interrupt and using the data RAM as
software counter for extending the counter stage.
FS
Data Bus
Timer/Counter
M
U
X
TCP1I
TBCK
TB1OV
TCP1S1
TCP1S0
TCP1LD
TCP1EN
TCP1OV
Preload Data
Data Bus
Figure: 8-bit Timer/Counter (TCP1)
FS
OSCH
Data Bus
M
U
X
PWMx Circuit
Timer/Counter
TBCK
TCP1OV
TCP2S1
TCP2S0
TCP2LD
TCP2EN
TCP2OV
Preload Data
Data Bus
Figure: 12-bit Timer/Counter/PWM (TCP2)
2015/05/25
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