TTP259
TonTouchTM
Preliminary
TCP2H[206H]: TCP2 high nibble data register [R/W], default value [0000]
Register Bit3 Bit2 Bit1 Bit0
Bit Name TCP2_11/TCP2D11 TCP2_10/TCP2D10 TCP2_9/TCP2D9 TCP2_8/TCP2D8
Read/Write R/W R/W R/W R/W
TCP2_11~TCP2_8: Reading TCP2 counter high nibble data.
TCP2D11~TCP2D8: Writing TCP2D high nibble of data buffer.
* TCP2D: Like a 12-bit TCP2 data register [R/W], default value [000H]
TCP2D
Bit11
Bit10
Bit9
Bit8
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Bit Name TCP2D11 TCP2D10 TCP2D9 TCP2D8 TCP2D7 TCP2D6 TCP2D5 TCP2D4 TCP2D3 TCP2D2 TCP2D1 TCP2D0
The special R/W function for TCP2 has different Target, AS writing
TCP2H/M/L registers that are updating preload data of the TCP2D. As read
TCP2H/M/L registers that are the brand new TCP2 counter value.
.Timer
When TCPx works as a Timer, user needs give the preload data TCPxD for
periodic interrupt. After initial setting, user starts the TCPx counting by setting.
When 8-bit TCP1 timer/counter:
TCP1EN=1, the TCP1 cycle period is:
Tc = (selected clock cycle) * (256) if TCP1D=00H
Tc = (selected clock cycle) * (TCP1D) otherwise
When 12-bit TCP2 timer/counter:
TCP2EN=1, the TCP2 cycle period is:
Tc = (selected clock cycle) * (4096) if TCP2D=000H
Tc = (selected clock cycle) * (TCP2D) otherwise
When 20-bit timer/counter:
Tc = (selected clock cycle) * (1048576) if TCP1D=00H and TCP2D=000H
Tc = (selected clock cycle) * (TCP2D*256+TCP1D) otherwise
When user writes data to the TCPxH/M/L, the data just keep in TCPxH/M/L
latch. During the TCPxEN=1 command executed, the TCPxH/M/L latch’s
complement value will load into counter TCPxH/M/L as initial value and start the
timer function. Necessary TCPxLD=1, timer run with reload feature as TCPx up
counts and reaches the value of FFH or 255 for TCP1 or value of FFFH or 4095
2015/05/25
Page 34 of 81
Ver: 1.1
TTELEC [ TT Electronics ]
