TE
tmCH
Preliminary T14L1024A
AC CHARACTERISTICS
(V =3.3V ±0.3V, Vss = 0V, Ta = 0 to 70°C)
cc
(1) READ CYCLE
T14L1024A-10 T14L1024A-12 T14L1024A-15
UNIT
PARAMETER
Read Cycle Time
SYM.
MIN. MAX. MIN. MAX. MIN. MAX.
10
-
-
10
10
6
12
-
-
12
12
7
15
-
-
15
15
7
tRC
tAA
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Access Time
Chip Enable Access Time
-
-
-
tACS
tAOE
tCLZ*
tOLZ*
tCHZ*
tOHZ*
tOH
Output Enable to Output Valid
Chip Enable to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
Output Hold from Address Change
-
-
-
3
0
-
-
3
0
-
-
3
0
-
-
-
-
-
5
6
7
-
5
-
6
-
7
3
-
3
-
3
-
* These parameters are sampled but not 100% tested.
(2)WRITE CYCLE
T14L1024A-10 T14L1024A-12 T14L1024A-15
MIN. MAX. MIN. MAX. MIN. MAX.
PARAMETER
Write Cycle Time
SYM.
UNIT
10
8
8
0
8
0
6
0
-
-
-
12
10
10
0
-
-
15
11
11
0
-
-
tWC
tCW
tAW
tAS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Chip Enable to End of Write
Address Valid to End of Write
Address Setup Time
-
-
-
-
-
-
Write Pulse Width
-
10
0
-
11
0
-
tWP
Write Recovery Time
-
-
-
tWR
tDW
tDH
tWHZ*
tOHZ*
tOW
Data Valid to End of Write
Data Hold from End of Write
Write to Output in High Z
Output Disable to Output in High Z
Output Active from End of Write
-
8
-
8
-
-
0
-
0
-
5
5
-
-
6
6
-
-
6
7
-
-
-
-
0
0
0
* These parameters are sampled but not 100% tested.
TM Technology, Inc. reserves the right
to change products or specifications without notice.
P. 4
Publication Date: SEP. 2002
Revision:0.F
TMT [ TAIWAN MEMORY TECHNOLOGY ]
