UCD9090
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SLVSA30A –APRIL 2011–REVISED AUGUST 2011
Layout Guidelines
The thermal pad provides a thermal and mechanical interface between the device and the printed circuit board
(PCB). Connect the exposed thermal pad of the PCB to the device VSS pins and provide at least a 4 × 4 pattern
of PCB vias to connect the thermal pad and VSS pins to the circuit ground on other PCB layers.
For supply-voltage decoupling, provide power-supply pin bypass to the device as follows:
•
•
•
0.1-μF, X7R ceramic in parallel with 0.01-μF, X7R ceramic at pin 35 (BPCAP)
0.1-μF, X7R ceramic in parallel with 4.7-μF, X5R ceramic at pin 33 (V33D
0.1-μF, X7R ceramic in parallel with 4.7-μF, X5R ceramic at pin 34 (V33A
)
)
Depending on use and application of the various GPIO signals used as digital outputs, some impedance control
may be desired to quiet fast signal edges. For example, when using the FPWM pins for fan control or voltage
margining, the pin is configured as a digital clock signal. Route these signals away from sensitive analog signals.
It is also good design practice to provide a series impedance of 20 Ω to 33 Ω at the signal source to slow fast
digital edges.
Estimating ADC Reporting Accuracy
The UCD9090 uses a 12-bit ADC and an internal 2.5-V reference (VREF) to convert MON pin inputs into digitally
reported voltages. The least significant bit (LSB) value is VLSB = VREF/2N where N = 12, resulting in a VLSB = 610
μV. The error in the reported voltage is a function of the ADC linearity errors and any variations in VREF. The
total unadjusted error (ETUE) for the UCD9090 ADC is ±5 LSB, and the variation of VREF is ±0.5% between 0°C
and 125°C and ±1% between –40°C and 125°C. VTUE is calculated as VLSB × ETUE. The total reported voltage
error is the sum of the reference-voltage error and VTUE. At lower monitored voltages, VTUE dominates reported
error, whereas at higher monitored voltages, the tolerance of VREF dominates the reported error. Reported error
can be calculated using Equation 3, where REFTOL is the tolerance of VREF, VACT is the actual voltage being
monitored at the MON pin, and VREF is the nominal voltage of the ADC reference.
æ
ç
è
ö
÷
ø
V
REF ´ETUE
1+REFTOL
æ
ö
RPTERR
=
´
+ VACT -1
ç
÷
VACT
4096
è
ø
(3)
From Equation 3, for temperatures between 0°C and 125°C, if VACT = 0.5 V, then RPTERR = 1.11%. If VACT = 2.2
V, then RPTERR = 0.64%. For the full operating temperature range of –40°C to 125°C, if VACT = 0.5 V, then
RPTERR = 1.62%. If VACT = 2.2 V, then RPTERR = 1.14%.
SPACER
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41
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