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UCD7100PWPR 参数 Datasheet PDF下载

UCD7100PWPR图片预览
型号: UCD7100PWPR
PDF下载: 下载PDF文件 查看货源
内容描述: 数字控制兼容单低侧± 4 -A的MOSFET电流检测驱动程序 [Digital Control Compatible Single Low-Side ±4-A MOSFET Driver with Current Sense]
分类和应用: 驱动器MOSFET驱动器驱动程序和接口接口集成电路光电二极管PC
文件页数/大小: 26 页 / 813 K
品牌: TI [ TEXAS INSTRUMENTS ]
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UCD7100  
www.ti.com  
SLUS651C MARCH 2005REVISED MAY 2010  
Thermal Information  
The useful range of a driver is greatly affected by the drive power requirements of the load and the thermal  
characteristics of the device package. In order for a power driver to be useful over a particular temperature range  
the package must allow for the efficient removal of the heat produced while keeping the junction temperature  
within rated limits. The UCD7K family of drivers is available in PowerPAD™ TSSOP package to cover a range of  
application requirements. Both have the exposed pads to relieve thermal dissipation from the semiconductor  
junction.  
As illustrated in Reference [2], the PowerPAD™ packages offer a leadframe die pad that is exposed at the base  
of the package. This pad is soldered to the copper on the PC board (PCB) directly underneath the device  
package, reducing the ΘJC down to 4.7°C/W. The PC board must be designed with thermal lands and thermal  
vias to complete the heat removal subsystem, as summarized in Reference [3].  
Note that the PowerPAD™ is not directly connected to any leads of the package. However, it is electrically and  
thermally connected to the substrate which is the ground of the device.  
Circuit Layout Recommendations  
In a power driver operating at high frequency, it is a significant challenge to get clean waveforms without much  
overshoot/undershoot and ringing. The low output impedance of these drivers produces waveforms with high  
di/dt. This tends to induce ringing in the parasitic inductances. Utmost care must be used in the circuit layout. It is  
advantageous to connect the driver IC as close as possible to the leads. The driver device layout has the analog  
ground on the opposite side of the output, so the ground should be connected to the bypass capacitors and the  
load with copper trace as wide as possible. These connections should also be made with a small enclosed loop  
area to minimize the inductance.  
VIN  
VOUT  
Bias Supply  
Bias  
Winding  
UCD7100PWP  
1 VDD  
14  
13  
PVDD  
PVDD  
VDS  
3 3V3  
IN  
2
4
UCD91xx  
with  
CLA  
1
2
AGND  
VDS  
OUT 12  
OUT 11  
Peripheral  
CLF  
5
CS  
FB  
6
7
ILIM  
NC  
PGND  
PGND  
10  
9
2
8
CS  
CS  
COMMUNICATION  
(Programming & Status Reporting)  
2
Isolation  
Amplifier  
Figure 2. Isolated Forward Converter  
Copyright © 2005–2010, Texas Instruments Incorporated  
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Product Folder Link(s): UCD7100