SNVS856B – JUNE 2012 – REVISED MAY 2013
Delay Time Setting
In order to reduce EMI and switching loss, the TPS92314/14A inserts a delay between the off-period and the on-
period. The delay time is set by a single resistor which connects across the DLY pin and ground, and their
relationship is shown in
The optimal delay time depends on the resonance frequency between L
P
and
the drain to source capacitance of Q
1
(C
DS
). Circuit designers should optimize the delay time according to the
following equation.
(2)
(3)
After determining the delay time, t
DLY
can be implemented by setting R
DLY
according to the following equation:
where
•
K
DLY
= 32MΩ/ns is a constant
60
50
40
30
20
10
0
0
400
800
1200 1600
DELAY TIME (ns)
2000
(4)
RDLY(k )
Figure 17. Delay Time Setting
Protection Features
OUTPUT OPEN CIRCUIT PROTECTION
The open circuit protection can be trigger through ZCD pin or VCC pin. If the LED string is disconnected from the
output of the TPS92314/14A, The secondly output voltage (V
LED
) and AUX wiring voltage V
ZCD-PEAK
will
increases. IF V
ZCD-PEAK
is greater than V
ZCD-OVP
for 3 continues switching cycles or VCC voltage higher than
V
CCOVP
threshold, Over Voltage Protection (OVP) protection will be trigger. At the meantime, switching of Q
1
will
stop and V
CC
will decreases until it drops below the falling threshold of V
CC-UVLO
, the controller will restarts
automatically and enter into startup state (Figure
VCC OVP PROTECTION
The TPS92314/14A has a built-in over voltage protection feature. It can be trigger through the VCC pin when
over V
CC-OVP
threshold. Once the V
CC-OVP
triggered, the output gate signal will pull low and VCC will decrease
until it drops below the V
CC-UVLO
, the controller will restarts automatically.
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11
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