SNVS856B – JUNE 2012 – REVISED MAY 2013
V
SW
t
2xt
DLY
I
LP
V
COMP
t
t
ON
I
LS
I
LED
t
V
ZCD
V
ZCD-OVP
V
ZCD-PEAK
V
ZCD-ARM
V
ZCD-TRIG
t
DLY
t
OFF
t
Figure 14. Primary and Secondary Side Current Waveforms
Startup Bias and UVLO
During startup, the TPS92314/14A is powered from the AC line through R
1
and bridge diode D
1
(Typical
Application on front page). In the startup state, most of the internal circuits of the TPS92314/14A are shut down
in order to minimize internal quiescent current. When V
CC
reaches the rising threshold of the V
CC-UVLO
(typically
26V), the TPS92314/14A is operating in a low switching frequency mode, where t
ON
and t
OFF
are fixed to 1.5μs
and 72μs. When V
ZCD–PEAK
is higher than V
ZCD-ARM
, the TPS92314/14A enters normal operation.
Copyright © 2012–2013, Texas Instruments Incorporated
9
Product Folder Links: