TPS63000
TPS63001
TPS63002
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SLVS520–MARCH 2006
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A capacitor with a value in the range of the calculated minimum should be used. This is required to maintain
control loop stability. There are no additional requirements regarding minimum ESR. There is also no upper limit
for the output capacitance value. Larger capacitors will cause lower output voltage ripple as well as lower output
voltage drop during load transients.
Layout Considerations
As for all switching power supplies, the layout is an important step in the design, especially at high peak currents
and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as
well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground
tracks. The input capacitor, output capacitor, and the inductor should be placed as close as possible to the IC.
Use a common ground node for power ground and a different one for control ground to minimize the effects of
ground noise. Connect these ground nodes at any place close to one of the ground pins of the IC.
The feedback divider should be placed as close as possible to the control ground pin of the IC. To lay out the
control ground, it is recommended to use short traces as well, separated from the power ground traces. This
avoids ground shift problems, which can occur due to superimposition of power ground current and control
ground current.
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