TPS54610
SLVS398D − JUNE 2001 − REVISED JULY 2003
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ELECTRICAL CHARACTERISTICS (continued)
over operating free-air temperature range unless otherwise noted
PARAMETER
ERROR AMPLIFIER
Error amplifier open loop voltage gain
Error amplifier unity gain bandwidth
Error amplifier common mode input voltage
range
Input bias current, VSENSE
Output voltage slew rate (symmetric), COMP
PWM COMPARATOR
PWM comparator propagation delay time,
PWM comparator input to PH pin (excluding
deadtime)
SLOW-START/ENABLE
Enable threshold voltage, SS/ENA
Enable hysteresis voltage, SS/ENA
Falling edge deglitch, SS/ENA(1)
Internal slow-start time
Charge current, SS/ENA
Discharge current, SS/ENA
POWER GOOD
Power good threshold voltage
Power good hysteresis voltage(1)
Power good falling edge deglitch(1)
Output saturation voltage, PWRGD
Leakage current, PWRGD
CURRENT LIMIT
Current limit trip point
Current limit leading edge blanking time(1)
Current limit total response time(1)
THERMAL SHUTDOWN
Thermal shutdown trip point(1)
Thermal shutdown hysteresis(1)
OUTPUT POWER MOSFETS
rDS(on)
Power MOSFET switches
VI = 6 V(4)
VI = 3 V(4)
26
36
47
65
mΩ
135
150
10
165
°C
°C
VI = 3 V Output shorted(1)
VI = 6 V Output shorted(1)
7.2
10
10
12
100
200
A
ns
ns
I(sink) = 2.5 mA
VI = 5.5 V
VSENSE falling
90
3
35
0.18
0.3
1
%Vref
%Vref
µs
V
µA
SS/ENA = 0 V
SS/ENA = 0.2 V, VI = 2.7 V
2.6
3
2.0
0.82
1.20
0.03
2.5
3.35
5
2.3
4.1
8
4.0
1.40
V
V
µs
ms
µA
mA
10-mV overdrive(1)
70
85
ns
1 kΩ COMP to AGND(1)
Parallel 10 kΩ, 160 pF COMP to AGND(1)
Powered by internal LDO(1)
VSENSE = Vref
1.0
90
3
0
60
1.4
110
5
VBIAS
250
dB
MHz
V
nA
V/µs
TEST CONDITIONS
MIN
TYP
MAX
UNIT
(1) Specified by design
(2) Static resistive loads only
(3) Specified by the circuit used in Figure 10
(4) Matched MOSFETs low-side rDS(on) production tested, high-side rDS(on) specified by design
4
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