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TPS51640ARSLR 参数 Datasheet PDF下载

TPS51640ARSLR图片预览
型号: TPS51640ARSLR
PDF下载: 下载PDF文件 查看货源
内容描述: 双通道( 3相CPU / 1相GPU) SVID , D- CAP + ™降压控制器 [Dual-Channel (3-Phase CPU/1-Phase GPU) SVID, D-CAP+? Step-Down Controller for]
分类和应用: 控制器
文件页数/大小: 54 页 / 1760 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TPS51640A, TPS59640, TPS59641  
SLUSAQ2 JANUARY 2012  
www.ti.com  
ELECTRICAL CHARACTERISTICS  
over recommended free-air temperature range, VV5 = VV5DRV = 5.0 V; VV3R3 = 3.3 V; VxGFB = VPGND = VGND, VxVFB = VCORE  
(Unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
SUPPLY: CURRENTS, UVLO AND POWER-ON RESET  
IV5+ IV5DRV , VVDAC < VxVFB < (VVDAC + 100 mV),  
VR_ON = HI’  
V5 supply current CPU: 3-phase  
active GPU: 1-phase active  
IV5-4  
IV5-3  
IV5-2  
6.0  
5.5  
4.9  
9.0  
mA  
mA  
mA  
IV5+ IV5DRV, VVDAC < VxVFB < (VVDAC + 100 mV),  
VR_ON = HI, VCCSP3=3.3 V  
V5 supply current CPU: 2-phase  
active GPU: 1-phase active  
V5 supply current CPU: 1-phase IV5+ IV5DRV, VVDAC < VxVFB < (VVDAC + 100 mV),  
active GPU: 1-phase active  
VR_ON = HI, VCCSP3 = VCCSP2= 3.3 V  
IV5+ IV5DRV, VVDAC < VxVFB < (VVDAC + 100 mV),  
VR_ON = HI, SetPS = PS3  
(Note: 3-phase CPU goes to 1-phase in PS3)  
V5 supply current CPU: 3-phase  
active GPU: 1-phase active  
IV5-PS3  
5.1  
mA  
IV5STBY  
VUVLOH  
VUVLOL  
IV3R3  
V5DRV standby current  
V5 UVLO 'OK' Threshold  
V5 UVLO fault threshold  
V3R3 supply current  
VR_ON = LO, IV5 + IV5DRV  
Ramp up, VR_ON=HI,  
Ramp down, VR_ON = HI,  
SVID bus idle, VR_ON = HI’  
VR_ON = LO’  
10  
4.4  
4.2  
0.5  
20  
4.5  
4.3  
1.0  
10  
µA  
V
4.25  
3.95  
V
mA  
µA  
V
IV3R3SBY  
V3UVLOH  
V3UVLOL  
V3R3 standby current  
V3R3 UVLO 'OK' threshold  
V3R3 UVLO fault threshold  
Ramp up, VR_ON=HI,  
Ramp down, VR_ON = HI,  
2.5  
2.4  
2.9  
2.7  
3.0  
2.8  
V
REFERENCES: DAC, VREF, VBOOT AND DRVL DISCHARGE FOR BOTH CPU AND GPU  
TPS59640  
TPS51640A  
TPS59641  
0
V
VBOOT  
Boot voltage  
VID step size  
1.1  
5
VVIDSTP  
mV  
0.25 VxVFB 0.995V,  
IxPU_CORE = 0 A, 0°C TA 85°C  
TPS51640A  
5  
6  
5
8.3  
VDAC1  
xVFB tolerance no load active  
0.25 VxVFB 0.995V,  
IxPU_CORE = 0 A,  
40°C TA 105°C  
TPS59640  
TPS59641  
mV  
1.000V VxVFB 1.520 V,  
IxPU_CORE = 0 A, 0°C TA 85°C  
TPS51640A  
0.5%  
0.65%  
0.5%  
1.0%  
VDAC4  
xVFB tolerance above 1 V VID  
VREF Output  
1.000V VxVFB 1.520 V,  
IxPU_CORE = 0 A,  
40°C TA 105°C  
TPS59640  
TPS59641  
VVREF  
4.5 V VV5 5.5 V, IVREF= 0 A  
0 µA IVREF 500 µA  
1.70  
0.1  
0.1  
V
VVREFSRC VREF output source  
4  
mV  
mV  
mV  
VVREFSNK  
VDLDQ  
VREF output sink  
500 µA IVREF 0 µA  
4
DRVL discharge threshold  
Soft-stop transistor turns on at this point.  
200  
300  
VOLTAGE SENSE: xVFB AND xGFB FOR BOTH CPU AND GPU  
IxVFB  
xVFB input bias current  
xGFB input bias current  
xGFB/GND gain  
VxVFB=2 V, VxGFB=0 V  
VxVFB=2 V, VxGFB=0 V  
20  
-20  
1
40  
µA  
µA  
IxGFB  
-40  
AGAINGND  
V/V  
CURRENT MONITOR  
VCiMONLK Zero level current output  
VCIMONLO Low level current output  
VCIMONMID Mid level current output  
VCIMONHI High level current output  
ZERO-CROSSING  
Inductor zero crossing threshold  
Σ∆CS = 0 mV, AIMON = 12 × (1+1.27)  
Σ∆CS = 15.6 mV, AIMON = 12 × (1+1.27)  
Σ∆CS = 31.1 mV, AIMON = 12 × (1+1.27)  
Σ∆CS = 62.3 mV, AIMON = 12 × (1+1.27)  
35  
425  
mV  
mV  
mV  
mV  
850  
1700  
VZx  
0
mV  
voltage  
4
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