TPS40190
www.ti.com
TERMINAL
SLUS658A–JULY 2005–REVISED AUGUST 2005
DEVICE INFORMATION
TERMINAL FUNCTIONS
I/O
DESCRIPTION
NAME
NO.
BOOT
8
I
Power supply for the flying high-side driver
Output bypass for the internal regulator. Connect 4.7-µF capacitor from this pin to GND. Low power, low
noise loads may be connected here if desired. The sum of the external load and the gate drive requirements
must not exceed 40 mA.
BP5
6
3
O
O
Output of the error amplifier. Connecting a resistance from COMP to GND sets the output short circuit
detection threshold. See applications information for details.
COMP
Logic level input that starts or stops the controller from an external user command. A high level turns the
controller on. This pin has a high-impedance internal pull-up integrated into the device. Because this pin is
high impedance, a 10-nF capacitor to ground or an external pull-up resistor (100 kΩ) to VDD is
recommended to avoid noise coupling to this pin.
ENABLE
1
I
FB
2
5
I
Inverting input to the error amplifier
GND
HDRV
LDRV
-
Common connection for the controller
10
7
O
O
Bootstrapped output for driving the gate of the high side N channel FET.
Output to the rectifier FET gate
Sense line for the adaptive anti cross conduction circuitry. Serves as common connection for the flying high
side FET driver
SW
9
4
I
I
VDD
Power input to the controller
DRC PACKAGE
(TOP VIEW)
GND VDD COMP FB ENABLE
5
4
3
2
1
TPS40190DRC
6
7
8
9
10
BP5 LDRV BOOT SW HDRV
5
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