TPS23750
TPS23770
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SLVS590A–JULY 2005–REVISED AUGUST 2005
APPLICATION INFORMATION (continued)
The value of RCLASS should be chosen from the values listed in Table 2 based on the average power
requirements of the PD. The power rating of this resistor should be chosen so that it is not overstressed for the
required 75 ms classification period, during which 10 V is applied. The PD could be in classification for extended
periods during bench test conditions, or if an auxiliary power source with voltage within the classification range is
connected to the PD front end. Thermal protection may activate and turn classification off if it continues for more
than 75 ms, but the design must not rely on this function to protect the resistor.
NORMAL OPERATION AND PoE UNDERVOLTAGE LOCKOUT (UVLO)
The TPS23750 incorporates an undervoltage lockout (UVLO) circuit that monitors PoE input voltage to determine
when to apply power to the converter, allowing the PD to power up and run. The IEEE 802.3af specification
dictates a maximum PD turn-on voltage of 42 V and a minimum turn-off voltage of 30 V (see Figure 30). The
IEEE 802.3af standard assumes an 8 V drop in the cabling based on a 20 Ω feed resistance and a 400 mA
maximum inrush limit. Because the minimum PSE output voltage is 44 V, the PD must continue to operate
properly with input voltages as low as 36 V. The TPS23750 allows an input diode drop of 1.5 V and sets its
nominal turn-on at 39.3 V and its turn-off at 30.5 V, while the TPS23770 turns on at 35 V with the same turn-off.
The TPS23770 UVLO limits are designed to support legacy systems whose minimum output voltage is less than
44 V. These systems required a lower turn-on voltage and smaller hysteresis. Although the TPS23770 works
with compliant PSEs, it could potentially exhibit startup instabilities if the PSE output voltage rises slowly. The
TPS23750 is recommended for applications with compliant PSEs.
The MPS is an electrical signature presented by the PD to assure the PSE that it is still present. A valid MPS
consists of a minimum dc current of 10 mA and an ac impedance lower than a series 26.25 kΩ and 0.05 µF load.
The ac impedance is usually overshadowed by the minimum capacitance requirement of 5 µF.
PD STATE MACHINE AND CONVERTER OPERATION
The TPS23750 incorporates a state machine that controls the inrush and operational current limit states. When
VDD is below the lower UVLO limit, the pass MOSFET is off. Consequently, the RTN pin is high impedance, and
at VDD once the output capacitor is discharged by the converter. When VDD rises above the UVLO turn-on
threshold with RTN high, the TPS23750 enables the internal power MOSFET with the current limit set to 140 mA.
The converter is disabled while the output capacitor charges and VRTN falls from VDD to nearly VSS. Once the
inrush current falls about 10% below the programmed limit, the current limit switches to the internal 450 mA
operational level after a 375 µs delay. The converter section is enabled once the current limit is switched and the
converter begins a softstart cycle. If the input voltage drops below the lower UVLO, the PoE MOSFET turns off,
but the converter is allowed to operate to a (VVDD- VSS) of about 18 V.
The internal pass MOSFET is protected against output faults with a current limit and a form of foldback when it is
operating in the full current limit state. The PSE output cannot be relied on to protect the PD MOSFET against
transient conditions, so the PD implements its own output protection. High stress conditions include converter
output shorts, shorts from VDD to RTN, or transients on the input line. An overload on the pass MOSFET
engages the current limit, with (VRTN - VSS) rising as a result. If VRTN rises above 12 V, the current limit state
machine resets to the 140 mA inrush current limit, and turns off the converter. The thermal shutdown activates to
protect the device if the power dissipation from current limit overheats the TPS23750 as described in the thermal
protection section below. The RTN comparator is capable of detecting even short excursions of RTN over 12 V
that can be caused during overloads and input transients. If the fault that caused the overload disappears, the
TPS23750 goes through a normal startup cycle as discussed above. This form of protection limits the peak
dissipation in the MOSFET, prevents lockup of the converter in current limit, protects the load from a harmful
voltage droop, and allows an orderly recovery from a known state if the problem disappears.
The TPS23750 allows startup and operation from a 24 V to 48 V adapter when it is connected from VDD to RTN
without PoE power available. Converter operation is enabled if
•
•
•
The PoE section is not in inrush, and
VDD - VSS has exceeded 20.5 V with RTN less than 1.5 V, and
VDD - VSS is greater than 18 V.
The thresholds are defined in terms of VDD - VSS even though the converter really operates from VDD to RTN.
The internal PoE pass MOSFET has a reverse diode which clamps VSS to one diode drop above RTN when the
device is powered from the output side.
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