TMS320F28335, TMS320F28334, TMS320F28332
TMS320F28235, TMS320F28234, TMS320F28232
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SPRS439I–JUNE 2007–REVISED MARCH 2011
Table 6-16. STANDBY Mode Timing Requirements
TEST CONDITIONS
Without input qualification
With input qualification(1)
MIN
3tc(OSCCLK)
NOM
MAX
UNIT
Pulse duration, external
wake-up signal
tw(WAKE-INT)
cycles
(2 + QUALSTDBY) * tc(OSCCLK)
(1) QUALSTDBY is a 6-bit field in the LPMCR0 register.
Table 6-17. STANDBY Mode Switching Characteristics
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Delay time, IDLE instruction
executed to XCLKOUT low
td(IDLE-XCOL)
32tc(SCO)
45tc(SCO)
cycles
Delay time, external wake
signal to program execution
resume(1)
td(WAKE-STBY)
cycles
cycles
Without input qualifier
With input qualifier
Without input qualifier
With input qualifier
100tc(SCO)
•
Wake up from flash
–
Flash module in active
state
100tc(SCO) + tw(WAKE-INT)
1125tc(SCO)
•
Wake up from flash
cycles
cycles
–
Flash module in sleep
state
1125tc(SCO) + tw(WAKE-INT)
Without input qualifier
With input qualifier
100tc(SCO)
•
Wake up from SARAM
100tc(SCO) + tw(WAKE-INT)
(1) This is the time taken to begin execution of the instruction that immediately follows the IDLE instruction. execution of an ISR (triggered
by the wake up signal) involves additional latency.
Copyright © 2007–2011, Texas Instruments Incorporated
Electrical Specifications
135
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