TMS320F28335, TMS320F28334, TMS320F28332
TMS320F28235, TMS320F28234, TMS320F28232
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SPRS439I–JUNE 2007–REVISED MARCH 2011
Unless otherwise specified, all XINTF timing is applicable for the clock configurations shown in Table 6-37.
Table 6-37. XINTF Clock Configurations
MODE
SYSCLKOUT
150 MHz
XTIMCLK
SYSCLKOUT
150 MHz
XCLKOUT
SYSCLKOUT
150 MHz
1
Example:
2
SYSCLKOUT
150 MHz
1/2 SYSCLKOUT
75 MHz
Example:
3
150 MHz
1/2 SYSCLKOUT
75 MHz
1/2 SYSCLKOUT
75 MHz
Example:
4
150 MHz
1/2 SYSCLKOUT
75 MHz
1/4 SYSCLKOUT
37.5 MHz
Example:
150 MHz
The relationship between SYSCLKOUT and XTIMCLK is shown in Figure 6-22 .
PCLKR3[XINTFENCLK]
XTIMING0
LEAD/ACTIVE/TRAIL
XTIMING6
XTIMING7
XBANK
0
0
1
SYSCLKOUT
C28x
CPU
XTIMCLK
/2
1
0
XCLKOUT
/2
1
0
XINTCNF2 (XTIMCLK)
XINTCNF2
(CLKMODE)
XINTCNF2
(CLKOFF)
Figure 6-22. Relationship Between XTIMCLK and SYSCLKOUT
Copyright © 2007–2011, Texas Instruments Incorporated
Electrical Specifications
153
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