Peripherals
ADCINA[7:0]
ADCINB[7:0]
ADCLO
ADC 16-Channel Analog Inputs
Test Pin
Analog Input 0−3 V With Respect to ADCLO
Connect to Analog Ground
ADCBGREFIN
24.9 kꢀ ꢂ20 kꢀ (See Note C)
ADC External Current Bias Resistor
ADC Reference Positive Input
ADC Reference Medium Input
ADCRESEXT
ADCREFP
(See
Note D)
2 V
1 V
ADCREFM
1 ꢁF −10 ꢁF
1 ꢁF − 10 ꢁF
V
V
V
V
Analog 3.3 V
Analog 3.3 V
DDA1
DDA2
SSA1
SSA2
ADC Analog Power
AVDDREFBG
AVSSREFBG
Analog 3.3 V
ADC Reference Power
ADC Analog I/O Power
ADC Digital Power
V
V
Analog 3.3 V
Analog Ground
DDAIO
SSAIO
V
V
1.8 V Can use the same 1.8-V (or 1.9-V)
DD1
SS1
Digital Ground
supply as the digital core but separate the
two with a ferrite bead or a filter
NOTES: A. External decoupling capacitors are recommended on all power pins.
B. Analog inputs must be driven from an operational amplifier that does not degrade the ADC performance.
C. Use 24.9 kΩ for ADC clock range 1 − 18.75 MHz; use 20 kΩ for ADC clock range 18.75 − 25 MHz.
D. It is recommended that buffered external references be provided with a voltage difference of (ADCREFP-ADCREFM)
= 1 V $ 0.1% or better.
External reference is enabled using bit 8 in the ADCTRL3 Register at ADC power up. In this mode, the accuracy of
external reference is critical for overall gain. The voltage ADCREFP−ADCREFM will determine the overall accuracy.
Do not enable internal references when external references are connected to ADCREFP and ADCREFM. See the
TMS320x281x DSP Analog-to-Digital Converter (ADC) Reference Guide (literature number SPRU060) for more
information.
Figure 4−6. ADC Pin Connections With External Reference
67
April 2001 − Revised December 2004
SPRS174L
TI [ TEXAS INSTRUMENTS ]
