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TMS320VC5407PGER 参数 Datasheet PDF下载

TMS320VC5407PGER图片预览
型号: TMS320VC5407PGER
PDF下载: 下载PDF文件 查看货源
内容描述: [IC,DSP,16-BIT,QFP,144PIN,PLASTIC]
分类和应用:
文件页数/大小: 107 页 / 1364 K
品牌: TI [ TEXAS INSTRUMENTS ]
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Functional Overview
The direction bits (DIRx) are used to configure HD0–HD7 as inputs or outputs.
The status of the GPIO pins can be monitored using the bits of the GPIOSR. The GPIOSR is shown in
Figure 3–24.
15
Reserved
0
8
7
IO7
R/W-0
IO6
R/W-0
IO5
R/W-0
4
IO4
R/W-0
3
IO3
R/W-0
IO2
R/W-0
IO1
R/W-0
0
IO0
R/W-0
LEGEND:
R = Read, W = Write,
n = value after reset
Figure 3–24. General-Purpose I/O Status Register (GPIOSR) [MMR Address 003Dh]
3.15 Device ID Register
A read-only memory-mapped register has been added to the 5407/5404 to allow user application software
to identify on which device the program is being executed.
15
Chip ID
R
8
7
Chip Revision
R
LEGEND:
R = Read, W = Write
4
3
SUBSYSID
R
0
Figure 3–25. Device ID Register (CSIDR) [MMR Address 003Eh]
Table 3–22. Device ID Register (CSIDR) Bit Functions
BIT
NO.
15–8
7–4
3–0
BIT
NAME
Chip ID
Chip Revision
SUBSYSID
FUNCTION
Chip identification (hex code of 06 for 5407 and 03 for 5404)
Chip revision identification
Subsystem identification (0000b for single core devices)
48
SPRS007B
November 2001 – Revised July 2003