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SPRS174S – APRIL 2001 – REVISED MARCH 2011
6.8
Power Sequencing Requirements
TMS320F2812/F2811/F2810 silicon requires dual voltages (1.8-V or 1.9-V and 3.3-V) to power up the
CPU, Flash, ROM, ADC, and the I/Os. To ensure the correct reset state for all modules during power up,
there are some requirements to be met while powering up/powering down the device. The current F2812
silicon reference schematics (Spectrum Digital Incorporated eZdsp board) suggests two options for the
power sequencing circuit.
Power sequencing is not needed for C281x devices. In other words, 3.3-V and 1.8-V (or 1.9-V) can ramp
together. C281x can also be used on boards that have F281x power sequencing implemented; however, if
the 1.8-V (or 1.9-V) rail lags the 3.3-V rail, the GPIO pins are undefined until the 1.8-V rail reaches at least
1 V.
• Option 1:
In this approach, an external power sequencing circuit enables V
DDIO
first, then V
DD
and V
DD1
(1.8 V or 1.9 V). After 1.8 V (or 1.9 V) ramps, the 3.3 V for Flash (V
DD3VFL
) and ADC
(V
DDA1
/V
DDA2
/AVDDREFBG) modules are ramped up. While option 1 is still valid, TI has simplified the
requirement. Option 2 is the recommended approach.
• Option 2:
Enable power to all 3.3-V supply pins (V
DDIO
, V
DD3VFL
, V
DDA1
/V
DDA2
/V
DDAIO
/AVDDREFBG) and then
ramp 1.8 V (or 1.9 V) (V
DD
/V
DD1
) supply pins.
1.8 V or 1.9 V (V
DD
/V
DD1
) should not reach 0.3 V until V
DDIO
has reached 2.5 V. This ensures the reset
signal from the I/O pin has propagated through the I/O buffer to provide power-on reset to all the
modules inside the device. See
for power-on reset timing.
• Power-Down Sequencing:
During power-down, the device reset should be asserted low (8 µs, minimum) before the V
DD
supply
reaches 1.5 V. This will help to keep on-chip flash logic in reset prior to the V
DDIO
/V
DD
power supplies
ramping down. It is recommended that the device reset control from “Low-Dropout (LDO)” regulators or
voltage supervisors be used to meet this constraint. LDO regulators that facilitate power-sequencing
(with the aid of additional external components) may be used to meet the power sequencing
requirement. See
for F2812 eZdsp™ schematics and updates.
Table 6-4. Recommended “Low-Dropout Regulators”
SUPPLIER
Texas Instruments
PART NUMBER
TPS767D301
NOTE
The GPIO pins are undefined until V
DD
= 1 V and V
DDIO
= 2.5 V.
Copyright © 2001–2011, Texas Instruments Incorporated
Electrical Specifications
97
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