TMS320F28027, TMS320F28027-Q1, TMS320F28027F, TMS320F28027F-Q1, TMS320F28026
TMS320F28026-Q1, TMS320F28026F, TMS320F28026F-Q1, TMS320F28023
TMS320F28023-Q1, TMS320F28022, TMS320F28021, TMS320F28020, TMS320F280200
ZHCSA13P –NOVEMBER 2008 –REVISED FEBRUARY 2021
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8.5.4 Reducing Current Consumption
The 2802x/280200 devices incorporate a method to reduce the device current consumption. Because each
peripheral unit has an individual clock-enable bit, significant reduction in current consumption can be achieved
by turning off the clock to any peripheral module that is not used in a given application. Furthermore, any one of
the three low-power modes could be taken advantage of to reduce the current consumption even further. 表 8-1
indicates the typical reduction in current consumption achieved by turning off the clocks.
表8-1. Typical Current Consumption by Various
Peripherals (at 60 MHz)
PERIPHERAL
MODULE(1) (3)
IDD CURRENT
REDUCTION (mA)
ADC
2(2)
I2C
ePWM
3
2
eCAP
2
SCI
2
SPI
2
COMP/DAC
HRPWM
1
3
CPU-TIMER
Internal zero-pin oscillator
1
0.5
(1) All peripheral clocks (except CPU Timer clocks) are disabled
upon reset. Writing to/reading from peripheral registers is
possible only after the peripheral clocks are turned on.
(2) This number represents the current drawn by the digital portion
of the ADC module. Turning off the clock to the ADC module
results in the elimination of the current drawn by the analog
portion of the ADC (IDDA) as well.
(3) For peripherals with multiple instances, the current quoted is per
module. For example, the 2 mA value quoted for ePWM is for
one ePWM module.
备注
IDDIO current consumption is reduced by 15 mA (typical) when XCLKOUT is turned off.
备注
The baseline IDD current (current when the core is executing a dummy loop with no peripherals
enabled) is 45 mA, typical. To arrive at the IDD current for a given application, the current-drawn by the
peripherals (enabled by that application) must be added to the baseline IDD current.
Following are other methods to reduce power consumption further:
• The flash module may be powered down if code is run off SARAM. This results in a current reduction of 18
mA (typical) in the VDD rail and 13 mA (typical) in the VDDIO rail.
• Savings in IDDIO may be realized by disabling the pullups on pins that assume an output function.
• To realize the lowest VDDA current consumption in a low-power mode, see the respective analog chapter of
the TMS320F2802x,TMS320F2802xx Technical Reference Manual to ensure each module is powered down
as well.
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