TMS320DM6437
Digital Media Processor
www.ti.com
SPRS345B–NOVEMBER 2006–REVISED MARCH 2007
Table 6-74. Switching Characteristics Over Recommended Operating Conditions for McASP(1)(2)
(see Figure 6-43 and Figure 6-44)(3)
-400
-500
-600
NO.
PARAMETER
UNIT
MIN
MAX
9
tc(AHCKRX)
tw(AHCKRX)
Cycle time, AHCLKR/X
25
ns
ns
AH -
2.5
10
Pulse duration, AHCLKR/X high or low
11
12
tc(CKRX)
tw(CKRX)
Cycle time, ACLKR/X
ACLKR/X int
ACLKR/X int
ACLKR/X int
ACLKR/X ext
ACLKX int
25
A - 2.5
-2.25
0
ns
ns
ns
ns
ns
ns
ns
ns
Pulse duration, ACLKR/X high or low
5.5
13
14
15
td(CKRX-FRX)
Delay time, ACLKR/X transmit edge to AFSX/R output valid
Delay time, ACLKX transmit edge to AXR output valid
12.5
5.5
-2.25
0
td(CKX-AXRV)
ACLKX ext
12.5
8
ACLKR/X int
ACLKR/X ext
-4.5
-4.5
Disable time, AXR high impedance following last data bit from
ACLKR/X transmit edge
tdis(CKRX-AXRHZ)
12.5
(1) A = (ACLKR/X period)/2 in ns. For example, when ACLKR/X period is 25 ns, use A = 12.5 ns.
(2) AH = (AHCLKR/X period)/2 in ns. For example, when AHCLKR/X period is 25 ns, use AH = 12.5 ns.
(3) ACLKX internal: ACLKXCTL.CLKXM=1, PDIR.ACLKX = 1
ACLKX external input: ACLKXCTL.CLKXM=0, PDIR.ACLKX=0
ACLKX external output: ACLKXCTL.CLKXM=0, PDIR.ACLKX=1
ACLKR internal: ACLKRCTL.CLKRM=1, PDIR.ACLKR = 1
ACLKR external input: ACLKRCTL.CLKRM=0, PDIR.ACLKR=0
ACLKR external output: ACLKRCTL.CLKRM=0, PDIR.ACLKR=1
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Peripheral Information and Electrical Specifications
265