TMS320C6678
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS691D—April 2013
www.ti.com
3.3.17 Timer Input Selection Register (TINPSEL)
Timer input selection is handled within the control register TINPSEL. The Timer Input Selection Register is shown
in Figure 3-16 and described in Table 3-18
Figure 3-16
Timer Input Selection Register (TINPSEL)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
TINPH TINPL TINPH TINPL TINPH TINPL TINPH TINPL TINPH TINPL TINPH TINPL TINPH TINPL TINPH TINPL
SEL15 SEL15 SEL14 SEL14 SEL13 SEL13 SEL12 SEL12 SEL11 SEL11 SEL10 SEL10 SEL9 SEL9 SEL8 SEL8
RW, +1 RW, +0 RW, +1 RW, +0 RW, +1 RW, +0 RW, +1 RW, +0 RW, +1 RW, +0 RW, +1 RW, +0 RW, +1 RW, +1 RW, +1 RW, +0
spacer
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
TINPH TINPL TINPH TINPL TINPH TINPL TINPH TINPL TINPH TINPL TINPH TINPL TINPH TINPL TINPH TINPL
SEL7 SEL7 SEL6 SEL6 SEL5 SEL5 SEL4 SEL4 SEL3 SEL3 SEL2 SEL2 SEL1 SEL1 SEL0 SEL0
RW, +1 RW, +0 RW, +1 RW, +0 RW, +1 RW, +0 RW, +1 RW, +0 RW, +1 RW, +0 RW, +1 RW, +0 RW, +1 RW, +1 RW, +1 RW, +0
Legend: R = Read only; RW = Read/Write; -n = value after reset
Table 3-18
Timer Input Selection Field Description (TINPSEL) (Part 1 of 3)
Description
Bit
Field
TINPHSEL15
31
Input select for TIMER15 high.
0 = TIMI0
1 = TIMI1
30
29
28
27
26
25
24
23
22
21
TINPLSEL15
TINPHSEL14
TINPLSEL14
TINPHSEL13
TINPLSEL13
TINPHSEL12
TINPLSEL12
TINPHSEL11
TINPLSEL11
TINPHSEL10
Input select for TIMER15 low.
0 = TIMI0
1 = TIMI1
Input select for TIMER14 high.
0 = TIMI0
1 = TIMI1
Input select for TIMER14 low.
0 = TIMI0
1 = TIMI1
Input select for TIMER13 high.
0 = TIMI0
1 = TIMI1
Input select for TIMER13 low.
0 = TIMI0
1 = TIMI1
Input select for TIMER12 high.
0 = TIMI0
1 = TIMI1
Input select for TIMER12 low.
0 = TIMI0
1 = TIMI1
Input select for TIMER11 high.
0 = TIMI0
1 = TIMI1
Input select for TIMER11 low.
0 = TIMI0
1 = TIMI1
Input select for TIMER10 high.
0 = TIMI0
1 = TIMI1
Copyright 2013 Texas Instruments Incorporated
Device Configuration 91
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