TMS320C6672
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS708C—February 2012
www.ti.com
4 System Interconnect
On the TMS320C6672 device, the C66x CorePacs, the EDMA3 transfer controllers, and the system peripherals are
interconnected through the TeraNet, which is a non-blocking switch fabric enabling fast and contention-free
internal data movement. The TeraNet allows for low-latency, concurrent data transfers between master peripherals
and slave peripherals. The TeraNet also allows for seamless arbitration between the system masters when accessing
system slaves.
4.1 Internal Buses and Switch Fabrics
Two types of buses exist in the device: data buses and configuration buses. Some peripherals have both a data bus
and a configuration bus interface, while others have only one type of interface. Further, the bus interface width and
speed varies from peripheral to peripheral. Configuration buses are mainly used to access the register space of a
peripheral and the data buses are used mainly for data transfers.
The C66x CorePacs, the EDMA3 traffic controllers, and the various system peripherals can be classified into two
categories: masters and slaves. Masters are capable of initiating read and write transfers in the system and do not rely
on the EDMA3 for their data transfers. Slaves, on the other hand, rely on the masters to perform transfers to and
from them. Examples of masters include the EDMA3 traffic controllers, SRIO, and Network Coprocessor packet
DMA. Examples of slaves include the SPI, UART, and I2C.
The masters and slaves in the device are communicating through the TeraNet (switch fabric). The device contains
two switch fabrics. The data switch fabric (data TeraNet) and the configuration switch fabric (configuration
TeraNet). The data TeraNet, is a high-throughput interconnect mainly used to move data across the system. The
data TeraNet connects masters to slaves via data buses. Some peripherals require a bridge to connect to the data
TeraNet. The configuration TeraNet, is mainly used to access peripheral registers. The configuration TeraNet
connects masters to slaves via configuration buses. As with the data TeraNet, some peripherals require the use of a
bridge to interface to the configuration TeraNet. Note that the data TeraNet also connects to the configuration
TeraNet. For more details see 4.2 ‘‘Switch Fabric Connections’’.
Copyright 2012 Texas Instruments Incorporated
System Interconnect 91
TI [ TEXAS INSTRUMENTS ]
