TMS320C6672
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS708C—February 2012
www.ti.com
Table 2-16
Terminal Functions — Signals and Control by Function (Part 9 of 12)
Signal Name
Ball No. Type IPD/IPU Description
HyperLink
MCMRXN0
U2
T2
I
MCMRXP0
I
MCMRXN1
T1
I
MCMRXP1
R1
I
Serial HyperLink Receive Data
MCMRXN2
M1
N1
P2
I
MCMRXP2
I
MCMRXN3
I
MCMRXP3
N2
M5
N5
T4
I
MCMTXN0
O
O
O
O
O
O
O
O
O
O
I
MCMTXP0
MCMTXN1
MCMTXP1
U4
R5
Serial HyperLink Transmit Data
MCMTXN2
MCMTXP2
T5
MCMTXN3
N4
P4
MCMTXP3
MCMRXFLCLK
MCMRXFLDAT
MCMTXFLCLK
MCMTXFLDAT
MCMRXPMCLK
MCMRXPMDAT
MCMTXPMCLK
MCMTXPMDAT
MCMREFCLKOUTP
MCMREFCLKOUTN
W3
W4
AA1
AA3
Y3
Down
Down
Down
Down
Down
Down
Down
Down
I
Serial HyperLink Sideband Signals
I
Y4
I
AA2
AA4
Y1
O
O
O
O
HyperLink Reference clock output for daisy chain connection
W1
I2C
SCL
AD3
AC4
IOZ
IOZ
I2C Clock
I2C Data
SDA
JTAG
TCK
TDI
N29
P27
R29
P29
P28
I
UP
JTAG Clock Input
JTAG Data Input
JTAG Data Output
JTAG Test Mode Input
JTAG Reset
I
UP
TDO
TMS
TRST
OZ
UP
I
I
UP
Down
MDIO
MDIO
G26
H26
IOZ
O
UP
MDIO Data
MDCLK
Down
MDIO Clock
Copyright 2012 Texas Instruments Incorporated
Device Overview 49